Patents by Inventor Robert D. Gardner

Robert D. Gardner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240151895
    Abstract: A variety of illumination devices are disclosed that are configured to manipulate light provided by one or more light-emitting elements (LEEs). In general, embodiments of the illumination devices feature one or more optical couplers that redirect illumination from the LEEs to a reflector which then directs the light into a range of angles. In some embodiments, the illumination device includes a second reflector that reflects at least some of the light from the first reflector. In certain embodiments, the illumination device includes a light guide that guides light from the collector to the first reflector. The components of the illumination device can be configured to provide illumination devices that can provide a variety of intensity distributions. Such illumination devices can be configured to provide light for particular lighting applications, including office lighting, task lighting, cabinet lighting, garage lighting, wall wash, stack lighting, and downlighting.
    Type: Application
    Filed: June 2, 2023
    Publication date: May 9, 2024
    Inventors: Wilson Dau, Robert C. Gardner, George Lerman, Louis Lerman, Christopher H. Lowery, Brian D. Ogonowsky, George E. Smith, Ingo Speier, Robert V. Steele, Jacqueline Teng, Allan Brent York, Hans Peter Stormberg
  • Patent number: 11978735
    Abstract: A semiconductor device includes a substrate having a substrate surface, a transistor stack provided on the substrate surface and including a plurality of transistors stacked on each other along a vertical direction that is perpendicular to the substrate surface. Each transistor in the transistor stack includes a vertical channel structure extending along the vertical direction and having a first vertical sidewall and a second vertical sidewall opposite to the first vertical sidewall, and a ferroelectric gate structure in contact with the first vertical sidewall of the vertical channel structure; and a back gate structure provided on the substrate and in contact with the second vertical sidewall of the vertical channel structure of each respective transistor in the transistor stack.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: May 7, 2024
    Assignee: Tokyo Electron Limited
    Inventors: Mark I. Gardner, Robert D. Clark, H. Jim Fulford
  • Publication number: 20240139441
    Abstract: A system may include a mobile application residing on an external device and an inhalation device. The inhalation device may include a mouthpiece, a mouthpiece cover, medicament, and an electronics module comprising a processor. The inhalation device may be configured to both prepare a dose of medicament for delivery to a user and cause the processor to transition between power states when the mouthpiece cover is moved from a closed position to an open position to expose the mouthpiece. The electronics module or the mobile application may be configured to generate usage events based on usage of the inhalation device by the user. The electronics module may also include a pressure sensor, and the electronics module or the mobile application may be configured to determine whether a usage event is a good inhalation event, a fair inhalation event, or a no inhalation event based on feedback from the pressure sensor.
    Type: Application
    Filed: January 10, 2024
    Publication date: May 2, 2024
    Applicant: Norton (Waterford) Limited
    Inventors: Enrique Calderon Oliveras, Carl L. Lewis, Symon D'Oyly Cotton, Steven D. Gardner, Robert O. Kivlin, Amir Zur
  • Patent number: 11942536
    Abstract: Systems and methods for manufacturing two-dimensional (2D) gas channel for vertical transistors. The system can include a semiconductor device. The semiconductor device can include a channel structure surrounding a first dielectric core. The channel structure can include a first two-dimensional (2D) material and a second 2D material. The semiconductor device can include a source metal surrounding a first portion of the channel structure. The semiconductor device can include a drain metal surrounding a second portion of the channel structure. The semiconductor device can include a gate metal surrounding a third portion of the channel structure.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: March 26, 2024
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Robert D. Clark, H. Jim Fulford, Mark I. Gardner
  • Publication number: 20230273885
    Abstract: Herein are solutions for computer bus transaction processing by a device that is rebooting. Data and logic of a bus driver of a device are configured to remain loaded and fully operational during an operating system (OS) kernel reboot on the device. That logic is specially memory mapped into an unused area of volatile memory that is not overwritten by the OS kernel. Driver logic is self-contained such that its statically linked codebase contains all logic needed to detect and fully handle an outstanding bus transaction. In an embodiment having a host computer that is connected to a device by a bus, a central processing unit (CPU) of the device bootstraps an OS kernel of the device. Concurrent to bootstrapping the OS kernel, the CPU of the device detects a transaction on the bus that was not initiated by the device, executes an instruction sequence for the transaction, and sends on the bus a response to the transaction.
    Type: Application
    Filed: February 28, 2022
    Publication date: August 31, 2023
    Inventors: Robert D. Gardner, Henry Willard
  • Patent number: 10387061
    Abstract: Techniques herein perform coprocessor assisted memory filling in a pipeline. A computer receives a request to fill multiple ranges of memory addresses with a value. The computer selects a first subset of the multiple ranges and distributes the first subset of ranges to multiple coprocessors. The coprocessors begin to fill the memory locations of the first subset of ranges with the value. At the same time as the coprocessors fill the first subset of ranges, the computer selects a second subset of the multiple ranges of memory addresses. Also while the coprocessors are still filling the first subset of ranges, the computer distributes the second subset of ranges to the coprocessors This overlapping activity achieves a processing pipeline that can be extended for any amount of additional subsets of memory ranges.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: August 20, 2019
    Assignee: Oracle International Corporation
    Inventors: Kishore Pusukuri, Robert D. Gardner
  • Patent number: 10346208
    Abstract: To provide an arrangement of virtual machines on physical machines, at least one controller compares indicators associated with plural different layouts of the virtual machines on the physical machines, wherein the indicators provide information regarding performances of corresponding layouts. The at least one controller selects one of the plural layouts based on the comparing.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: July 9, 2019
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Chris D. Hyser, Bret A. McKee, Robert D. Gardner, Daniel J. Magenheimer
  • Publication number: 20180225677
    Abstract: Among other things, a computer-implemented method for presenting an ad. The method includes receiving from an advertiser a predetermined level of online interest in a specified topic. The method further includes determining whether a current level of online interest meets or exceeds the predetermined level, and selectively presenting the ad based on the determination.
    Type: Application
    Filed: March 26, 2018
    Publication date: August 9, 2018
    Inventors: Russell K. Ketchum, Eugen C. Nistor, James L. Wogullis, Ruth A. Doane, Mark Scheele, Neil C. Rhodes, Robert D. Gardner
  • Publication number: 20180074742
    Abstract: Techniques herein perform coprocessor assisted memory filling in a pipeline. A computer receives a request to fill multiple ranges of memory addresses with a value. The computer selects a first subset of the multiple ranges and distributes the first subset of ranges to multiple coprocessors. The coprocessors begin to fill the memory locations of the first subset of ranges with the value. At the same time as the coprocessors fill the first subset of ranges, the computer selects a second subset of the multiple ranges of memory addresses. Also while the coprocessors are still filling the first subset of ranges, the computer distributes the second subset of ranges to the coprocessors This overlapping activity achieves a processing pipeline that can be extended for any amount of additional subsets of memory ranges.
    Type: Application
    Filed: November 16, 2017
    Publication date: March 15, 2018
    Inventors: Kishore Pusukuri, Robert D. Gardner
  • Patent number: 9823871
    Abstract: Techniques herein perform coprocessor assisted memory filling in a pipeline. A computer receives a request to fill multiple ranges of memory addresses with a value. The computer selects a first subset of the multiple ranges and distributes the first subset of ranges to multiple coprocessors. The coprocessors begin to fill the memory locations of the first subset of ranges with the value. At the same time as the coprocessors fill the first subset of ranges, the computer selects a second subset of the multiple ranges of memory addresses. Also while the coprocessors are still filling the first subset of ranges, the computer distributes the second subset of ranges to the coprocessors This overlapping activity achieves a processing pipeline that can be extended for any amount of additional subsets of memory ranges.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: November 21, 2017
    Assignee: Oracle International Corporation
    Inventors: Kishore Pusukuri, Robert D. Gardner
  • Publication number: 20170102892
    Abstract: Techniques herein perform coprocessor assisted memory filling in a pipeline. A computer receives a request to fill multiple ranges of memory addresses with a value. The computer selects a first subset of the multiple ranges and distributes the first subset of ranges to multiple coprocessors. The coprocessors begin to fill the memory locations of the first subset of ranges with the value. At the same time as the coprocessors fill the first subset of ranges, the computer selects a second subset of the multiple ranges of memory addresses. Also while the coprocessors are still filling the first subset of ranges, the computer distributes the second subset of ranges to the coprocessors This overlapping activity achieves a processing pipeline that can be extended for any amount of additional subsets of memory ranges.
    Type: Application
    Filed: October 9, 2015
    Publication date: April 13, 2017
    Inventors: Kishore Pusukuri, Robert D. Gardner
  • Patent number: 9418220
    Abstract: A system includes a memory and a controller. The controller controls access to the memory and is adapted to be programmed with a key that is associated with a context. The controller is adapted to, in response to a request to access the memory, perform a cryptographic function on data associated with the request based on the key.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: August 16, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Bret McKee, Chris D Hyser, Robert D. Gardner, Brian Watson
  • Patent number: 9092250
    Abstract: To provide an arrangement of virtual machines on physical machines, at least one controller compares indicators associated with plural different layouts of the virtual machines on the physical machines, wherein the indicators provide information regarding performances of corresponding layouts. The at least one controller selects one of the plural layouts based on the comparing.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: July 28, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Chris D. Hyser, Bret A. McKee, Robert D. Gardner, Daniel J. Magenheimer
  • Patent number: 8910152
    Abstract: To migrate a virtual machine from a first physical machine to a second physical machine, a hot-plug event notification is issued to an operating system of the virtual machine in response to an indication that the virtual machine is to be migrated. After issuing the hot-plug event notification, migration of the virtual machine to the second physical machine is performed.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: December 9, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Chris D. Hyser, Bret A. McKee, Robert D. Gardner, Brian J. Watson
  • Patent number: 8799891
    Abstract: According to at least one embodiment, a method comprises observing communication from a virtual machine (VM) to a virtual machine monitor (VMM). The method further comprises determining, based on the observed communication, CPU utilization of the VMM that is attributable to the VM. According to at least one embodiment, a system comprises a Central Processing Unit (CPU), Virtual Machines (VMs), and a Virtual Machine Monitor (VMM) operable to receive requests for resource access from the VMs. The system further comprises a CPU utilization monitor operable to determine an amount of CPU utilization of the VMM in processing the received requests that is attributable to each of the VMs.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: August 5, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ludmila Cherkasova, Robert D. Gardner
  • Patent number: 8786034
    Abstract: Hot-melt sealing glass compositions that include one or more glass frits dispersed in a polymeric binder system. The polymeric binder system is a solid at room temperature, but melts at a temperature of from about 35° C. to about 90° C., thereby forming a flowable liquid dispersion that can be applied to a substrate (e.g., a cap wafer and/or a device wafer of a MEMS device) by screen printing. Hot-melt sealing glass compositions according to the invention rapidly re-solidify and adhere to the substrate after being deposited by screen printing. Thus, they do not tend to spread out as much as conventional solvent-based glass frit bonding pastes after screen printing. And, because hot-melt sealing glass compositions according to the invention are not solvent-based systems, they do not need to be force dried after deposition.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: July 22, 2014
    Assignee: Ferro Corporation
    Inventors: Robert D. Gardner, Keith M. Mason, Srinivasan Sridharan, Aziz S. Shaikh
  • Patent number: 8782671
    Abstract: A method comprises determining a flexible limit on an amount of resource usage by a driver domain on behalf of a given virtual machine (VM). The method further comprises controlling the resource usage by the driver domain on behalf of the given VM so as not to exceed the flexible limit except under a permitted condition. In certain embodiments the resource usage by the driver domain on behalf of the given VM is controlled so as not to exceed the flexible limit except when a slack share of resource usage is available to the driver domain. Such a slack share of resource usage is a share of resource usage allocated to the driver domain that will not otherwise be used on behalf of another VM.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: July 15, 2014
    Assignee: Hewlett-Packard Development Company, L. P.
    Inventors: Ludmila Cherkasova, Diwaker Gupta, Robert D. Gardner
  • Publication number: 20140114773
    Abstract: A simultaneous ascending price auction (“SAA”) can be used to allocate advertising inventory to bidders. The advertising inventory can be, for example, radio or television advertisement spots (“spots”). The bidders can be advertisers that can provide advertisements for presentation in the spots. Two or more contiguous spots can define an advertising block. Spots or advertising blocks can be allocated to advertisers by the SAA mechanism based on bid criteria. The SAA can perform simultaneous advertisement scheduling and pricing. The auction allocation can be optimized to facilitate efficient allocation of advertisements to spots or blocks.
    Type: Application
    Filed: November 19, 2013
    Publication date: April 24, 2014
    Applicant: Google Inc.
    Inventors: Stephen G. Stukenborg, Daniel J. Zigmond, Jason Bayer, Danny Tom, Kaustuv, Jagpreet S. Duggal, Robert D. Gardner, Deepak Chandra, Neil C. Rhodes, Noam Nisan, Tal Franji, Misha Seltzer, Hal R. Varian, Yossi Matias
  • Patent number: 8615436
    Abstract: A simultaneous ascending price auction (“SAA”) can be used to allocate advertising inventory to bidders. The advertising inventory can be, for example, radio or television advertisement spots (“spots”). The bidders can be advertisers that can provide advertisements for presentation in the spots. Two or more contiguous spots can define an advertising block. Spots or advertising blocks can be allocated to advertisers by the SAA mechanism based on bid criteria. The SAA can perform simultaneous advertisement scheduling and pricing. The auction allocation can be optimized to facilitate efficient allocation of advertisements to spots or blocks.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: December 24, 2013
    Assignee: Google Inc.
    Inventors: Steve Stukenborg, Daniel J. Zigmond, Jason Bayer, Danny Tom, Kaustuv Kaustuv, Jagpreet S. Duggal, Robert D. Gardner, Deepak Chandra, Neil C. Rhodes, Noam Nisan, Tal Franji, Misha Seltzer, Hal R. Varian, Yossi Matias
  • Publication number: 20130062712
    Abstract: Hot-melt sealing glass compositions that include one or more glass frits dispersed in a polymeric binder system. The polymeric binder system is a solid at room temperature, but melts at a temperature of from about 35° C. to about 90° C., thereby forming a flowable liquid dispersion that can be applied to a substrate (e.g., a cap wafer and/or a device wafer of a MEMS device) by screen printing. Hot-melt sealing glass compositions according to the invention rapidly re-solidify and adhere to the substrate after being deposited by screen printing. Thus, they do not tend to spread out as much as conventional solvent-based glass frit bonding pastes after screen printing. And, because hot-melt sealing glass compositions according to the invention are not solvent-based systems, they do not need to be force dried after deposition.
    Type: Application
    Filed: September 10, 2012
    Publication date: March 14, 2013
    Applicant: FERRO CORPORATION
    Inventors: Robert D. Gardner, Keith M. Mason, Srinivasan Sridharan, Aziz S. Shaikh