Patents by Inventor Robert F. Steimle
Robert F. Steimle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9988260Abstract: A surface of a cavity of a MEMS device that is rough to reduce stiction. In some embodiments, the average roughness (Ra) of the surface is 5 nm or greater. In some embodiments, the rough surface is formed by forming one or more layers of a rough oxidizable material, then oxidizing the material to form an oxide layer with a rough surface. Another layer is formed over the oxide layer with the rough surface, wherein the roughness of the oxide layer is transferred to the another layer.Type: GrantFiled: April 29, 2016Date of Patent: June 5, 2018Assignee: NXP USA, Inc.Inventors: Ruben B. Montez, Arvind S. Salian, Robert F. Steimle
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Publication number: 20170313573Abstract: A surface of a cavity of a MEMS device that is rough to reduce stiction. In some embodiments, the average roughness (Ra) of the surface is 5 nm or greater. In some embodiments, the rough surface is formed by forming one or more layers of a rough oxidizable material, then oxidizing the material to form an oxide layer with a rough surface. Another layer is formed over the oxide layer with the rough surface, wherein the roughness of the oxide layer is transferred to the another layer.Type: ApplicationFiled: April 29, 2016Publication date: November 2, 2017Inventors: RUBEN B. MONTEZ, ARVIND S. SALIAN, ROBERT F. STEIMLE
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Patent number: 9776853Abstract: A mechanism for reducing stiction in a MEMS device by decreasing surface area between two surfaces that can come into close contact is provided. Reduction in contact surface area is achieved by increasing surface roughness of one or both of the surfaces. The increased roughness is provided by forming a micro-masking layer on a sacrificial layer used in formation of the MEMS device, and then etching the surface of the sacrificial layer. The micro-masking layer can be formed using nanoclusters. When a next portion of the MEMS device is formed on the sacrificial layer, this portion will take on the roughness characteristics imparted on the sacrificial layer by the etch process. The rougher surface decreases the surface area available for contact in the MEMS device and, in turn, decreases the area through which stiction can be imparted.Type: GrantFiled: February 23, 2016Date of Patent: October 3, 2017Assignee: NXP USA, Inc.Inventors: Robert F. Steimle, Ruben B. Montez
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Patent number: 9637372Abstract: A multi-wafer structure is formed by forming a cavity in a cap wafer and forming a first seal material around the cavity. A collapsible standoff structure is formed around the cavity. A movable mass is formed in a device wafer. A second seal material is formed around the movable mass. The first seal material and the second seal material are of materials that are able to form a eutectic bond at a eutectic temperature. The cap wafer and the device wafer are arranged so that the first and second seals are aligned but separated by the collapsible standoff structure. Gas is evacuated from the cavity at a temperature above the eutectic temperature using a low pressure. The temperature is lowered, the cap and device wafer are pressed together, and the temperature is raised above the eutectic temperature to form a eutectic bond with the first and second seal materials.Type: GrantFiled: April 27, 2015Date of Patent: May 2, 2017Assignee: NXP USA, INC.Inventors: Robert F. Steimle, Aaron A. Geisberger, Jeffrey D. Hanna, Ruben B. Montez
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Patent number: 9550664Abstract: A mechanism for reducing stiction in a MEMS device by decreasing surface area between two surfaces, such as a travel stop and travel stop region, that can come into close contact is provided. Reduction in contact surface area is achieved by increasing surface roughness of the travel stop region. This is achieved by depositing a polysilicon layer over a dielectric layer using gaseous hydrochloric acid as one of the reactants. A subsequent etch back is performed to further increase the roughness. The deposition of polysilicon and subsequent etch back may be repeated one or more times in order to obtain the desired roughness. A final polysilicon layer may then be deposited to achieve a desired thickness. This final polysilicon layer is patterned to form the travel stop regions. The rougher surface decreases the surface area available for contact and, in turn, decreases the area through which stiction can be imparted.Type: GrantFiled: December 18, 2014Date of Patent: January 24, 2017Assignee: NXP USA, INC.Inventors: Ruben B. Montez, Robert F. Steimle
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Publication number: 20160311676Abstract: A multi-wafer structure is formed by forming a cavity in a cap wafer and forming a first seal material around the cavity. A collapsible standoff structure is formed around the cavity. A movable mass is formed in a device wafer. A second seal material is formed around the movable mass. The first seal material and the second seal material are of materials that are able to form a eutectic bond at a eutectic temperature. The cap wafer and the device wafer are arranged so that the first and second seals are aligned but separated by the collapsible standoff structure. Gas is evacuated from the cavity at a temperature above the eutectic temperature using a low pressure. The temperature is lowered, the cap and device wafer are pressed together, and the temperature is raised above the eutectic temperature to form a eutectic bond with the first and second seal materials.Type: ApplicationFiled: April 27, 2015Publication date: October 27, 2016Inventors: Robert F. STEIMLE, Aaron A. GEISBERGER, Jeffrey D. HANNA, Ruben B. MONTEZ
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Patent number: 9463976Abstract: A method and apparatus are described for fabricating a high aspect ratio MEMS sensor device having multiple vertically-stacked inertial transducer elements (101B, 110D) formed in different layers of a multi-layer semiconductor structure (100) and one or more cap devices (200, 300) bonded to the multi-layer semiconductor structure (100) to protect any exposed inertial transducer element from ambient environmental conditions.Type: GrantFiled: June 27, 2014Date of Patent: October 11, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Robert F. Steimle, Paul M. Winebarger
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Patent number: 9463973Abstract: A mechanism for reducing stiction in a MEMS device by decreasing an amount of carbon from TEOS-based silicon oxide films that can accumulate on polysilicon surfaces during fabrication is provided. A carbon barrier material film is deposited between one or more polysilicon layer in a MEMS device and the TEOS-based silicon oxide layer. This barrier material blocks diffusion of carbon into the polysilicon, thereby reducing accumulation of carbon on the polysilicon surfaces. By reducing the accumulation of carbon, the opportunity for stiction due to the presence of the carbon is similarly reduced.Type: GrantFiled: October 31, 2014Date of Patent: October 11, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Ruben B. Montez, Robert F. Steimle
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Patent number: 9458010Abstract: A method of making a semiconductor device forms anchors for one or more layers of material. The method includes depositing a first layer of material on a substrate, applying a mask over the first layer of material to mask nanoparticle-sized areas of the first material, removing portions of the first layer of material to form a first set of recesses around the nanoparticle-sized areas of the first material, depositing a second layer of material in the recesses and over the nanoparticle-sized areas so that a second set of recesses is formed in a top surface of the second layer of material, and forming a component of the semiconductor device over the second layer of material. Material of a bottom surface of the component is included in the second set of recesses.Type: GrantFiled: July 22, 2015Date of Patent: October 4, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Ruben B. Montez, Robert F. Steimle
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Patent number: 9443782Abstract: A method for protecting terminal elements on a wafer during wafer level fabrication processes entails applying a protective coating to the terminal elements prior to further processing operations. These processing operations may include back side grinding of the wafer and/or saw-to-reveal operations to expose the terminal elements from a cap wafer of a wafer structure. The protective coating can protect the terminal elements from potentially damaging contaminants, such as debris from the grinding or saw-to-reveal operations. Furthermore, the protective coating can protect the bond pads from coming into contact with a rapidly oxidizing environment when exposed to water. The protective coating may be a hot-water soluble thermoplastic material the melts from a solid form to a liquid form at a relatively low temperature to enable application of the protective coating in liquid form onto the terminal elements and clean removal of the protective coating from the terminal elements.Type: GrantFiled: August 11, 2015Date of Patent: September 13, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Robert F. Steimle, Dwight L. Daniels, Veera M. Gunturu
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Patent number: 9434602Abstract: Certain microelectromechanical systems (MEMS) devices, and methods of creating them, are disclosed. The method may include forming a structural layer over a substrate; forming a mask layer over the structural layer, wherein the mask layer is formed with a material selective to an etching process; forming a plurality of nanoclusters on the mask layer; and etching the structural layer using at least the etching process.Type: GrantFiled: July 30, 2014Date of Patent: September 6, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Robert F. Steimle, Ruben B. Montez
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Patent number: 9425115Abstract: A bonded semiconductor device comprising a support substrate, a semiconductor device located with respect to one side of the support substrate, a cap substrate overlying the support substrate and the device, a glass frit bond ring between the support substrate and the cap substrate, an electrically conductive ring between the support substrate and the cap substrate. The electrically conductive ring forms an inner ring around the semiconductor device and the glass frit bond ring forms an outer bond ring around the semiconductor device.Type: GrantFiled: December 12, 2013Date of Patent: August 23, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Ruben B. Montez, Robert F. Steimle
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Patent number: 9418830Abstract: A method of bonding a cap wafer to a device wafer includes heating the device wafer and the cap wafer in the chamber, cooling the device wafer and the cap wafer in the chamber, pressurizing the chamber, introducing gas into the chamber while the chamber is pressurized to accelerate a rate of one of a group consisting of the heating and the cooling, and applying pressure to the device wafer and the cap wafer while a bond is formed between the device wafer and the cap wafer.Type: GrantFiled: June 27, 2014Date of Patent: August 16, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Jeffrey D. Hanna, Robert F. Steimle, Michael D. Turner
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Publication number: 20160218045Abstract: A bonded semiconductor device comprising a support substrate, a semiconductor device located with respect to one side of the support substrate, a cap substrate overlying the support substrate and the device, a glass frit bond ring between the support substrate and the cap substrate, an electrically conductive ring between the support substrate and the cap substrate. The electrically conductive ring forms an inner ring around the semiconductor device and the glass frit bond ring forms an outer bond ring around the semiconductor device.Type: ApplicationFiled: December 12, 2013Publication date: July 28, 2016Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: RUBEN B. MONTEZ, ROBERT F. STEIMLE
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Publication number: 20160176707Abstract: A mechanism for reducing stiction in a MEMS device by decreasing surface area between two surfaces, such as a travel stop and travel stop region, that can come into close contact is provided. Reduction in contact surface area is achieved by increasing surface roughness of the travel stop region. This is achieved by depositing a polysilicon layer over a dielectric layer using gaseous hydrochloric acid as one of the reactants. A subsequent etch back is performed to further increase the roughness. The deposition of polysilicon and subsequent etch back may be repeated one or more times in order to obtain the desired roughness. A final polysilicon layer may then be deposited to achieve a desired thickness. This final polysilicon layer is patterned to form the travel stop regions. The rougher surface decreases the surface area available for contact and, in turn, decreases the area through which stiction can be imparted.Type: ApplicationFiled: December 18, 2014Publication date: June 23, 2016Inventors: Ruben B. Montez, Robert F. Steimle
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Publication number: 20160167944Abstract: A mechanism for reducing stiction in a MEMS device by decreasing surface area between two surfaces that can come into close contact is provided. Reduction in contact surface area is achieved by increasing surface roughness of one or both of the surfaces. The increased roughness is provided by forming a micro-masking layer on a sacrificial layer used in formation of the MEMS device, and then etching the surface of the sacrificial layer. The micro-masking layer can be formed using nanoclusters. When a next portion of the MEMS device is formed on the sacrificial layer, this portion will take on the roughness characteristics imparted on the sacrificial layer by the etch process. The rougher surface decreases the surface area available for contact in the MEMS device and, in turn, decreases the area through which stiction can be imparted.Type: ApplicationFiled: February 23, 2016Publication date: June 16, 2016Inventors: Robert F. Steimle, Ruben B. Montez
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Patent number: 9290380Abstract: A mechanism for reducing stiction in a MEMS device by decreasing surface area between two surfaces that can come into close contact is provided. Reduction in contact surface area is achieved by increasing surface roughness of one or both of the surfaces. The increased roughness is provided by forming a micro-masking layer on a sacrificial layer used in formation of the MEMS device, and then etching the surface of the sacrificial layer. The micro-masking layer can be formed using nanoclusters. When a next portion of the MEMS device is formed on the sacrificial layer, this portion will take on the roughness characteristics imparted on the sacrificial layer by the etch process. The rougher surface decreases the surface area available for contact in the MEMS device and, in turn, decreases the area through which stiction can be imparted.Type: GrantFiled: December 18, 2012Date of Patent: March 22, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Robert F. Steimle, Ruben B. Montez
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Publication number: 20160031698Abstract: Certain microelectromechanical systems (MEMS) devices, and methods of creating them, are disclosed. The method may include forming a structural layer over a substrate; forming a mask layer over the structural layer, wherein the mask layer is formed with a material selective to an etching process; forming a plurality of nanoclusters on the mask layer; and etching the structural layer using at least the etching process.Type: ApplicationFiled: July 30, 2014Publication date: February 4, 2016Inventors: Robert F. Steimle, Ruben B. Montez
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Publication number: 20150375995Abstract: A method and apparatus are described for fabricating a high aspect ratio MEMS sensor device having multiple vertically-stacked inertial transducer elements (101B, 110D) formed in different layers of a multi-layer semiconductor structure (100) and one or more cap devices (200, 300) bonded to the multi-layer semiconductor structure (100) to protect any exposed inertial transducer element from ambient environmental conditions.Type: ApplicationFiled: June 27, 2014Publication date: December 31, 2015Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Robert F. Steimle, Paul M. Winebarger
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Publication number: 20150380235Abstract: A method of bonding a cap wafer to a device wafer includes heating the device wafer and the cap wafer in the chamber, cooling the device wafer and the cap wafer in the chamber, pressurizing the chamber, introducing gas into the chamber while the chamber is pressurized to accelerate a rate of one of a group consisting of the heating and the cooling, and applying pressure to the device wafer and the cap wafer while a bond is formed between the device wafer and the cap wafer.Type: ApplicationFiled: June 27, 2014Publication date: December 31, 2015Inventors: JEFFREY D. HANNA, ROBERT F. STEIMLE, MICHAEL D. TURNER