Patents by Inventor Robert Frederick Stucke

Robert Frederick Stucke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6185693
    Abstract: A massively parallel system has a self-timed interface (STI) in which a clock signal clocks bit serial data onto a parallel, electrically conductive bus and the clock signal is transmitted on a separate line of the bus. The received data on each line of the bus is individually phase aligned with the clock signal. Digital data is transmitted at high speeds via the parallel bus to provide a scalable communications network for parallel processing systems while eliminating precise bus length and system clock rates as a critical or limiting factor.
    Type: Grant
    Filed: June 24, 1996
    Date of Patent: February 6, 2001
    Assignee: International Business Machines Corporation
    Inventors: Derrick Leroy Garmire, Robert Stanley Capowski, Daniel Francis Casper, Christine Marie Desnoyers, Frank David Ferraiolo, Marten Jan Halma, Robert Frederick Stucke
  • Patent number: 5968189
    Abstract: An error message is generated by a hardware element of a distributed computer system, when an error is detected. The error message is then forwarded from the hardware element to one or more designated processing nodes of the distributed computer system. The hardware element includes, for instance, a switch element or a communications adapter adapted to report detected errors.
    Type: Grant
    Filed: April 8, 1997
    Date of Patent: October 19, 1999
    Assignee: International Business Machines Corporation
    Inventors: Christine Marie Desnoyers, Derrick LeRoy Garmire, Antoinette Elaine Herrmann, Francis Alfred Kampf, Robert Frederick Stucke
  • Patent number: 5923840
    Abstract: An error message is generated by a hardware element of a distributed computer system, when an error is detected. The error message is then forwarded from the hardware element to one or more designated processing nodes of the distributed computer system. The hardware element includes, for instance, a switch element or a communications adapter adapted to report detected errors.
    Type: Grant
    Filed: April 8, 1997
    Date of Patent: July 13, 1999
    Assignee: International Business Machines Corporation
    Inventors: Christine Marie Desnoyers, Derrick LeRoy Garmire, Antoinette Elaine Herrmann, Francis Alfred Kampf, Robert Frederick Stucke
  • Patent number: 5694612
    Abstract: A massively parallel system has a self-timed interface (STI) in which a clock signal clocks bit serial data onto a parallel, electrically conductive bus and the clock signal is transmitted on a separate line of the bus. The received data on each line of the bus is individually phase aligned with the clock signal. Digital data is transmitted at high speeds via the parallel bus to provide a scalable communications network for parallel processing systems while eliminating precise bus length and system clock rates as a critical or limiting factor.
    Type: Grant
    Filed: June 24, 1996
    Date of Patent: December 2, 1997
    Assignee: International Business Machines Corporation
    Inventors: Derrick Leroy Garmire, Robert Stanley Capowski, Daniel Francis Casper, Christine Marie Desnoyers, Frank David Ferraiolo, Marten Jan Halma, Robert Frederick Stucke