Patents by Inventor Robert G. Mejia
Robert G. Mejia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230185353Abstract: A printer, according to an example, includes a sensor circuit to sense a position of an element of the printer, wherein the sensor circuit includes a comparison circuit to compare a sensed signal to a threshold signal and generate an output signal based on the comparison. The printer includes a controller to: repeatedly power on and power off the sensor circuit; receive the output signal of the comparison circuit when the sensor circuit is powered on, thereby receiving a plurality of output signals over time; and adjust the threshold signal based on at least one of the plurality of output signals.Type: ApplicationFiled: December 15, 2021Publication date: June 15, 2023Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Robert G. Mejia, David Lance Spaulding
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Patent number: 11451046Abstract: In example implementations, an apparatus is provided. The apparatus includes a plurality of power outputs, a logic controller and a single switch. Each one of the plurality of power outputs is communicatively coupled to a respective current/power sensor. The logic controller is communicatively coupled to the respective current/power sensor of each one of the plurality of power outputs. The single switch is communicatively coupled to the logic controller and the respective current/power sensor of each one of the plurality of power outputs. Power to each one of the plurality of power outputs is controlled by the logic controller via the single switch.Type: GrantFiled: March 22, 2018Date of Patent: September 20, 2022Assignee: Hewlett-Packard Development Company, L.P.Inventors: Nathan Logan, Robert G Mejia, Manuel Antonio Rodriguez, James Jensen
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Patent number: 11218071Abstract: An example system includes a rectifying component to convert an alternating current (AC) signal into a direct current (DC) signal. The system also includes a filtering component. The filtering component determines that a plurality of AC cycle drops have occurred and will deactivate the AC signal in response to that determination. Furthermore, the system includes an isolating component. The isolating component consumes greater than a threshold level of power in one state and less than a threshold level of power in another state. The isolating component is operating in the state that consumes greater than a threshold level of power when the signal that indicates the AC voltage is at a level in which it may allow the device to operate safely and properly is deactivated.Type: GrantFiled: April 30, 2018Date of Patent: January 4, 2022Assignee: Hewlett-Packard Development Company, L.P.Inventors: Robert G. Mejia, Nathan Logan, Bartley Mark Hirst
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Publication number: 20210344269Abstract: An example system includes a rectifying component to convert an alternating current (AC) signal into a direct current (DC) signal. The system also includes a filtering component. The filtering component determines that a plurality of AC cycle drops have occurred and will deactivate the AC signal in response to that determination. Furthermore, the system includes an isolating component. The isolating component consumes greater than a threshold level of power in one state and less than a threshold level of power in another state. The isolating component is operating in the state that consumes greater than a threshold level of power when the signal that indicates the AC voltage is at a level in which it may allow the device to operate safely and properly is deactivated.Type: ApplicationFiled: April 30, 2018Publication date: November 4, 2021Inventors: Robert G. Mejia, Nathan Logan, Bartley Mark Hirst
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Patent number: 11031768Abstract: A device includes a current sensor, a first current monitor, and a second current monitor. The current sensor is to sense a current between an input node and an output node. The first current monitor is to disconnect the input node from the output node in response to the sensed current exceeding a first threshold current for a period exceeding a threshold period. The second current monitor is to disconnect the input node from the output node in response to the sensed current exceeding a second threshold current greater than the first threshold current.Type: GrantFiled: April 13, 2016Date of Patent: June 8, 2021Assignee: Hewlett-Packard Development Company, L.P.Inventors: Fernando Bolanos, Wayne Tangen, Jim Jensen, Robert G Mejia
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Publication number: 20200403398Abstract: In example implementations, an apparatus is provided. The apparatus includes a plurality of power outputs, a logic controller and a single switch. Each one of the plurality of power outputs is communicatively coupled to a respective current/power sensor. The logic controller is communicatively coupled to the respective current/power sensor of each one of the plurality of power outputs. The single switch is communicatively coupled to the logic controller and the respective current/power sensor of each one of the plurality of power outputs. Power to each one of the plurality of power outputs is controlled by the logic controller via the single switch.Type: ApplicationFiled: March 22, 2018Publication date: December 24, 2020Inventors: Nathan Logan, Robert G Mejia, Manuel Antonio Rodriguez, James Jensen
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Patent number: 10739800Abstract: A power monitor circuit, includes a power delivery path including an input voltage, a first resistor, and a load. The power monitor circuit further includes a comparator to measure a voltage across the first resistor. The comparator includes an inverting input to measure a voltage on a first side of the first resistor, a non-inverting input to measure a voltage on a second side of the first resistor, a threshold input to receive a threshold input voltage level, and an output to generate a trip signal when the voltage across the first resistor meets the threshold input voltage input level. The power monitor circuit further includes a sub-circuit in series with the first resistor, the sub-circuit including a second resistor coupled to a Zener diode, the sub-circuit to feed the input voltage back into the inverting input of the comparator.Type: GrantFiled: July 21, 2016Date of Patent: August 11, 2020Assignee: Hewlett-Packard Development Company, L.P.Inventors: Robert G Mejia, Jim Jensen, Fernando Bolanos
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Publication number: 20190146529Abstract: In an example, an apparatus includes an electric current monitor circuit and a feedback sub-circuit. The electric current monitor circuit includes a comparator having an inverting input to measure a first voltage on a first side of a first resistor, a separate non-inverting input to measure a second voltage on a second side of the first resistor, and an output. The feedback sub-circuit feeds an input voltage back to the inverting input. The feedback sub-circuit includes a second resistor coupled to the inverting input and a Zener diode coupled between the output and the second resistor.Type: ApplicationFiled: July 21, 2016Publication date: May 16, 2019Inventors: Robert G Mejia, Jim Jensen, Fernando Bolanos
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Publication number: 20180366938Abstract: A device includes a current sensor, a first current monitor, and a second current monitor. The current sensor is to sense a current between an input node and an output node. The first current monitor is to disconnect the input node from the output node in response to the sensed current exceeding a first threshold current for a period exceeding a threshold period. The second current monitor is to disconnect the input node from the output node in response to the sensed current exceeding a second threshold current greater than the first threshold current.Type: ApplicationFiled: April 13, 2016Publication date: December 20, 2018Inventors: Fernando Bolanos, Wayne Tangen, Jim Jensen, Robert G Mejia
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Patent number: 8102904Abstract: A method of determining a data rate of a high speed serially transmitted data stream comprises statistically examining edge timing characteristics of the incoming data stream. Based on the edge characteristics, a signature is identified that is associated with the edge characteristics. Based on the identified signature, a data rate at which the data stream is being transmitted is determined.Type: GrantFiled: September 2, 2003Date of Patent: January 24, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventor: Robert G. Mejia
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Patent number: 7471615Abstract: A storage device includes a storage medium and a probe to read from and write to the storage medium. The storage medium has a plurality of storage regions, where each storage region contains information to identify whether another storage region is defective.Type: GrantFiled: July 30, 2004Date of Patent: December 30, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventors: Robert G. Mejia, Mauricio Huerta Alva
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Patent number: 7460462Abstract: A read/write arrangement for a contact probe storage arrangement or the like, has a cantilever disposed with a medium which is movable relative to the cantilever; a device associated with one of the cantilever and the medium which is configured to be responsive to changes in electrical field between the medium and the cantilever caused by a change in distance between the medium and the cantilever; a heater disposed on the cantilever for heating the medium and for inducing localized topographical changes which represent bits of data; and a circuit which electrically interconnects both of the device and the heater.Type: GrantFiled: December 17, 2003Date of Patent: December 2, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventors: Robert G. Mejia, Richard Lee Hilton
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Patent number: 7436753Abstract: A sensing device has a cantilever disposed with a medium which is movable relative to the cantilever, and a device associated with one of the cantilever and the medium, which is responsive to changes in electrical field between the medium and the cantilever caused by a distance between the medium and the cantilever changing.Type: GrantFiled: December 17, 2003Date of Patent: October 14, 2008Inventors: Robert G. Mejia, Curt Nelson Van Lydegraf
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Patent number: 7423954Abstract: An embodiment of a read mechanism used in a contact atomic resolution storage system, has a cantilever disposed with a medium which is movable relative to the cantilever. The cantilever has a probe which extends from the cantilever and which contacts a surface of the medium. A pod is formed on a side of the cantilever facing the medium and extends toward the media. A sensor element is formed on the pod so as to juxtapose the medium.Type: GrantFiled: December 17, 2003Date of Patent: September 9, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventor: Robert G. Mejia
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Patent number: 7236446Abstract: A storage device includes a storage medium and a probe to form perturbations in the storage medium. The storage device further includes a circuit to cause heating of the probe to perform an access operation, the circuit to compensate for variations in a temperature of the probe in performing the access operation.Type: GrantFiled: July 23, 2004Date of Patent: June 26, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: Robert G. Mejia, Richard L. Hilton
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Patent number: 7213086Abstract: A system comprises a storage controller for managing transfers of data between a host and storage memory; a data mover coupled to the storage controller handling data transferred between a host and storage memory; and a buffer coupled to the data mover for storing data being transferred. The storage controller modifies operation of the storage system based on status of the data transfer. An associate method comprises transferring data between a host and storage memory via a storage system, and dynamically adjusting operation of the storage system depending on status of the data transfer.Type: GrantFiled: October 28, 2003Date of Patent: May 1, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: Stewart R. Wyatt, Andrew M. Spencer, Robert G. Mejia, Connie K. Lemus, Kenneth J. Eldredge, Cyrille de Brebisson
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Patent number: 7007120Abstract: Systems and methods of information transfer are disclosed. In one embodiment, the system may comprise a master device and a slave device coupled by a bus in which clock information is embedded in the data stream. Various flow control techniques may be used to compensate for differences in transfer rates supported by the master and slave devices. Two types of synchronization fields may be employed to establish and maintain clock acquisition. The master device may transfer information to the slave device using a sync field of a first type followed by a first data packet, and the slave device may respond to each data packet with a sync field of a second, different type, followed by a status ready field if no additional time is needed before receiving another data packet.Type: GrantFiled: April 25, 2003Date of Patent: February 28, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Andrew M. Spencer, Robert G. Mejia
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Publication number: 20040267993Abstract: Systems and methods of information transfer are disclosed. In one embodiment, the system may comprise a master device and a slave device coupled by a bus in which clock information is embedded in the data stream. Various flow control techniques may be used to compensate for differences in transfer rates supported by the master and slave devices. Two types of synchronization fields may be employed to establish and maintain clock acquisition. The master device may transfer information to the slave device using a sync field of a first type followed by a first data packet, and the slave device may respond to each data packet with a sync field of a second, different type, followed by a status ready field if no additional time is needed before receiving another data packet.Type: ApplicationFiled: April 25, 2003Publication date: December 30, 2004Inventors: Andrew M. Spencer, Robert G. Mejia
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Patent number: 6680970Abstract: Methods and systems for data rate detection for multi-speed embedded clock serial receivers are described. In one embodiment, a method of determining a data rate of a high speed serially transmitted data stream comprises statistically examining edge characteristics of the incoming data stream. Based on the edge characteristics, a signature is identified that is associated with the edge characteristics. Based on the identified signature, a data rate at which the data stream is being transmitted is determined. In one embodiment, a clock extraction/data recovery circuit is provided for recovering an embedded clock and data from a high speed serially transmitted data stream. The circuit comprises a phase comparator that is configured to receive a high speed serially transmitted data stream and output indicia whenever the data stream experiences a data transition. A voltage controlled oscillator (VCO) is connected with the phase comparator and provides a clock signal having clock edges.Type: GrantFiled: May 23, 2000Date of Patent: January 20, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventor: Robert G. Mejia
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Patent number: 6658363Abstract: Pattern detection methods and arrangements are provided for monitoring a Fibre Channel, a Gigabit Ethernet, or other like data stream for programmable trigger patterns. Upon detecting a trigger pattern, the pattern detection methods and arrangements will assert an output. The output is useful for triggering oscilloscopes to be able to properly display the signal and more importantly, for arming time interval analyzers and other like test instruments. The pattern detection methods and arrangements are capable of dealing with elasticity in the data transmission channel. For example, the trigger pattern can be uniquely configured to a frame header or frame contents and the test instrument can be set to limit its sampling to within the frame bounds. In this manner all of the variability of fill transmission words appearing or disappearing essentially becomes transparent to the test instrument.Type: GrantFiled: January 18, 2001Date of Patent: December 2, 2003Assignee: Hewlett-Packard Development Company, L.P.Inventors: Robert G Mejia, Tammy T. Teuscher, Stephen J. Elliott