Abstract: A process for forming a resistive random-access memory device, the process comprising the steps of: depositing a first electrode on a substrate; forming a porous resistive memory material layer on the first electrode, wherein the porous resistive memory layer is formed by (i) depositing a gaseous composition comprising a silicon precursor and a porogen precursor and, once deposited, (ii) removing the porogen precursor by exposing the composition to UV radiation; and depositing a second electrode on top of the porous resistive memory material layer.

Abstract: Described herein are compositions and methods using same for forming a silicon-containing film such as without limitation a silicon oxide, silicon nitride, silicon oxynitride, a carbon-doped silicon nitride, or a carbon-doped silicon oxide film on at least a surface of a substrate having a surface feature. In one aspect, the composition comprises at least one compound is selected from the group consisting of a siloxane, an trisilylamine-based compound, an organoaminodisilane compound, and a cyclic trisilazane compound.

Abstract: Described herein is an apparatus comprising a plurality of silicon-containing layers wherein the silicon-containing layers are selected from a silicon oxide and a silicon nitride layer or film. Also described herein are methods for forming the apparatus to be used, for example, as 3D vertical NAND flash memory stacks. In one particular aspect or the apparatus, the silicon oxide layer comprises slightly compressive stress and good thermal stability. In this or other aspects of the apparatus, the silicon nitride layer comprises slightly tensile stress and less than 300 MPa stress change after up to about 800° C. thermal treatment. In this or other aspects of the apparatus, the silicon nitride layer etches much faster than the silicon oxide layer in hot H3PO4, showing good etch selectivity.

Abstract: Described herein is a method and composition comprising same for sealing the pores of a porous low dielectric constant (“low k”) layer by providing an additional thin dielectric film, referred to herein as a pore sealing layer, on at least a surface of the porous, low k layer to prevent further loss of dielectric constant of the underlying layer. In one aspect, the method comprises: contacting a porous low dielectric constant film with at least one organosilicon compound to provide an absorbed organosilicon compound and treating the absorbed organosilicon compound with ultraviolet light, plasma, or both, and repeating until a desired thickness of the pore sealing layer is formed.

Abstract: A method and composition for producing a porous low k dielectric film via chemical vapor deposition is provided. In one aspect, the method comprises the steps of: providing a substrate within a reaction chamber; introducing into the reaction chamber gaseous reagents including at least one structure-forming precursor comprising an alkyl-alkoxysilacyclic compound, and a porogen; applying energy to the gaseous reagents in the reaction chamber to induce reaction of the gaseous reagents to deposit a preliminary film on the substrate, wherein the preliminary film contains the porogen, and the preliminary film is deposited; and removing from the preliminary film at least a portion of the porogen contained therein and provide the film with pores and a dielectric constant of 2.7 or less. In certain embodiments, the structure-forming precursor further comprises a hardening additive.

Abstract: A process is provided for making a photovoltaic device comprising a silicon substrate comprising a p-n junction, the process comprising the steps of: forming an amorphous silicon carbide antireflective coating over at least one surface of the silicon substrate by chemical vapor deposition of a composition comprising a precursor selected from the group consisting of an organosilane, an aminosilane, and mixtures thereof, wherein the amorphous silicon carbide antireflective coating is a film represented by the formula SivCxNuHyFz, wherein v+x+u+y+z=100%, v is from 1 to 35 atomic %, x is from 5 to 80 atomic %, u is from 0 to 50 atomic %, y is from 10 to 50 atomic % and z is from 0 to 15 atomic %.

Abstract: Described herein are apparatus comprising one or more silicon-containing layers and a metal oxide layer. Also described herein are methods for forming one or more silicon-containing layers to be used, for example, as passivation layers in a display device. In one particular aspect, the apparatus comprises a transparent metal oxide layer, a silicon oxide layer and a silicon nitride layer. In this or other aspects, the apparatus is deposited at a temperature of 350° C. or below. The silicon-containing layers described herein comprise one or more of the following properties: a density of about 1.9 g/cm3 or greater; a hydrogen content of about 4×1022 cm?3 or less, and a transparency of about 90% or greater at 400-700 nm as measured by a UV-visible light spectrometer.

Abstract: Methods for depositing a passivation layer on a photovoltaic cell are disclosed. Methods include depositing a passivation layer comprising at least a bi-layer further comprising a silicon oxide and a silicon nitride layer. The silicon precursor(s) used for the deposition of the silicon oxide layer or the silicon nitride layer, respectively, is selected from the family of Si(OR1)xR2y, or from the family of SiRxHy, silane, and combinations thereof; wherein x+y=4, y?4; R1 is C1-C8 alkyl; R2 is selected from the group consisting of hydrogen, C1-C8 alkyl, and NR*3; R is C1-C8 alkyl or NR*3; wherein R* can be hydrogen or C1-C8 alkyl; C1-C8 alkyl can be linear, branched or cyclic, the ligand can be saturated, unsaturated, or aromatic (for cyclic alkyl). Photovoltaic devices containing the passivation layers are also disclosed.

Abstract: Chemical additives are used to increase the rate of deposition for the amorphous silicon film (?Si:H) and/or the microcrystalline silicon film (?CSi:H). The electrical current is improved to generate solar grade films as photoconductive films used in the manufacturing of Thin Film based Photovoltaic (TFPV) devices.

Abstract: Deposition methods are disclosed for producing a passivation layer on a photovoltaic cell. Method includes depositing a passivation layer comprising at least a bi-layer further comprising a silicon oxide and a silicon nitride layer. In one aspect, the silicon precursor(s) used for the deposition of the silicon oxide layer or the silicon nitride layer, respectively, is selected from the family SiRxHy or selected from the family SiRxH, silane, and combinations thereof, wherein in SiRxHy x+y=4, y?4 and R may be independently selected from the group consisting of C1-C8 linear alkyl, wherein the ligand may be saturated or unsaturated; C1-C8 branched alkyl, wherein the ligand may be saturated or unsaturated; C1-C8 cyclic alkyl, wherein the ligand may be saturated, unsaturated, or aromatic; and NR*3 wherein R* can be independently hydrogen; or linear, branched, cyclic, saturated, or unsaturated alkyl. Photovoltaic devices containing the passivation layers are also disclosed.

Abstract: The objective of this invention is to use chemical additives to increase the rate of deposition processes for the amorphous silicon film (?Si:H) and/or the microcrystalline silicon film (?CSi:H), and improve the electrical current generating capability of the deposited films for photoconductive films used in the manufacturing of Thin Film based Photovoltaic (TFPV) devices.

Abstract: The present invention is related to the field of semiconductor processing equipment and methods and provides, in particular, methods and apparatus for in-situ removal of undesired deposits in the interiors of reactor chambers, for example, on chamber walls and elsewhere. The invention provides methods according to which cleaning steps are integrated and incorporated into a high-throughput growth process. Preferably, the times when growth should be suspended and cleaning commenced and when cleaning should be terminated and growth resumed are automatically determined based on sensor inputs. The invention also provides reactor chamber systems for the efficient performance of the integrated cleaning/growth methods of this invention.

Abstract: A process for removing carbon-containing residues from a substrate is described herein. In one aspect, there is provided a process for removing carbon-containing residue from at least a portion of a surface of a substrate comprising: providing a process gas comprising an oxygen source, a fluorine source, an and optionally additive gas wherein the molar ratio of oxygen to fluorine contained within the process gas ranges from about 1 to about 10; activating the process gas using at least one energy source to provide reactive species; and contacting the surface of the substrate with the reactive species to volatilize and remove the carbon-containing residue from the surface.

Abstract: A process is provided for making a photovoltaic device comprising a silicon substrate comprising a p-n junction, the process comprising the steps of: forming an amorphous silicon carbide antireflective coating over at least one surface of the silicon substrate by chemical vapor deposition of a composition comprising a precursor selected from the group consisting of an organosilane, an aminosilane, and mixtures thereof, wherein the amorphous silicon carbide antireflective coating is a film represented by the formula SivCxNuHyFz, wherein v+x+u+y+z=100%, v is from 1 to 35 atomic %, x is from 5 to 80 atomic %, u is from 0 to 50 atomic %, y is from 10 to 50 atomic % and z is from 0 to 15 atomic %.

Abstract: A thermal process for cleaning equipment surfaces of undesired silicon nitride in semiconductor processing chamber with thermally activated source of pre-diluted fluorine is disclosed in the specification. The process comprising: (a)flowing pre-diluted fluorine in an inert gas through the chamber; (b)maintaining the chamber at an elevated temperature of 230° C. to 565° C. to thermally disassociate the fluorine; (c)cleaning undesired silicon nitride from the surfaces by chemical reaction of thermally disassociated fluorine in (b) with the undesired silicon nitride to form volatile reaction products; (d)removing the volatile reaction products from the chamber.

Abstract: Negative ion atmospheric pressure ionization mass spectrometers and selected ion mass spectrometers with a 63Ni ion source and a drift tube for reaction of a sample with electrons from the 63Ni ion source prior to analysis of a sample by mass spectrometry are provided. Also provided are methods for chemically analyzing a sample by negative ion atmospheric pressure ionization mass spectrometry by exposing the sample to electrons from a 63Ni ion source in a drift tube and allowing the sample and electrons to react in the drift tube prior to analysis via mass spectrometry.

Abstract: An on-line halogen analyzer system and method of use for semiconductor processing effluent monitoring. The system includes sampling the effluent stream into an absorption cell, and passing UV-Visible light through the effluent sample in the cell. After passing through the sample the light is collected by a photo detector for real-time wavelength-selective absorption analysis. The system provides simultaneous determination of the concentrations of multiple halogen gases (e.g. F2, Cl2, Br2, and I2) in semiconductor processing effluent streams. The invention can be used for chemical vapor deposition (CVD) chamber cleaning endpoint determination and to improve fluorine utilization efficiency in remote plasma downstream CVD chamber cleaning processes.

Abstract: An on-line halogen analyzer system and method of use for semiconductor processing effluent monitoring. The system includes sampling the effluent stream into an absorption cell, and passing UV-Visible light through the effluent sample in the cell. After passing through the sample the light is collected by a photo detector for real-time wavelength-selective absorption analysis. The system provides simultaneous determination of the concentrations of multiple halogen gases (e.g. F2, Cl2, Br2, and I2) in semiconductor processing effluent streams. The invention can be used for chemical vapor deposition (CVD) chamber cleaning endpoint determination and to improve fluorine utilization efficiency in remote plasma downstream CVD chamber cleaning processes.

Abstract: An apparatus for generating a low concentration calibration gas mixture containing percent, ppm, ppb or ppt amounts of a desired analyte from a high concentration gas mixture and a high purity diluent using a series of source gas containing vessels and a series of parallel gas or chemical conduits controlled by mass flow controllers in a purged enclosure with conduits to purge gas conduits of residual gases or corrosive gases.