Abstract: An actuation mechanism for use in a vehicle. The actuation mechanism includes one or more motors having an output shaft with a sun gear. At least a portion of the sun gear is drivingly connected to at least a portion of one or more planetary gears. The one or more planetary gears are drivingly connected to at least a portion of a carrier, a fixed non-rotating ring gear and an output gear. The disclosure further relates to a method of operating an actuation mechanism that is drivingly connected to at least a portion of a vehicle parking mechanism. The method includes providing an actuation mechanism, providing a parking mechanism and one or more sensors that are operably configured to collect an amount of data to be analyzed. Based on the data analyzed, one or more failures within the parking mechanism may be determined and an alert may be sent.

Abstract: In one embodiment, an apparatus includes a check/correct circuit coupled to a control circuit. The check/correct circuit is coupled to receive a block of data and corresponding check bits. The block of data is received as N transmissions, each transmission including M data bits and L check bits. The check/correct circuit is configured to detect one or more errors in each of a plurality of non-overlapping windows of K bits in the M data bits, responsive to the M data bits and the L check bits. The control circuit is configured to record which of the plurality of windows have had errors detected and, if a given window of the plurality of windows has had errors detected in each of the N transmissions of the block, the control circuit is configured to signal a device failure. Each of K, L, M, and N are integers greater than one.

Abstract: In one embodiment, an apparatus includes a check/correct circuit coupled to a control circuit. The check/correct circuit is coupled to receive a block of data and corresponding check bits. The block of data is received as N transmissions, each transmission including M data bits and L check bits. The check/correct circuit is configured to detect one or more errors in each of a plurality of non-overlapping windows of K bits in the M data bits, responsive to the M data bits and the L check bits. The control circuit is configured to record which of the plurality of windows have had errors detected and, if a given window of the plurality of windows has had errors detected in each of the N transmissions of the block, the control circuit is configured to signal a device failure. Each of K, L, M, and N are integers greater than one.

Abstract: In one embodiment, an apparatus includes a check/correct circuit coupled to a control circuit. The check/correct circuit is coupled to receive a block of data and corresponding check bits. The block of data is received as N transmissions, each transmission including M data bits and L check bits. The check/correct circuit is configured to detect one or more errors in each of a plurality of non-overlapping windows of K bits in the M data bits, responsive to the M data bits and the L check bits. The control circuit is configured to record which of the plurality of windows have had errors detected and, if a given window of the plurality of windows has had errors detected in each of the N transmissions of the block, the control circuit is configured to signal a device failure. Each of K, L, M, and N are integers greater than one.

Abstract: In one embodiment, an apparatus comprises a check/correct circuit coupled to a control circuit. The check/correct circuit is coupled to receive a block of data and corresponding check bits. The block of data is received as N transmissions, each transmission comprising M data bits and L check bits. The check/correct circuit is configured to detect one or more errors in each of a plurality of non-overlapping windows of K bits in the M data bits, responsive to the M data bits and the L check bits. The control circuit is configured to record which of the plurality of windows have had errors detected and, if a given window of the plurality of windows has had errors detected in each of the N transmissions of the block, the control circuit is configured to signal a device failure. Each of K, L, M, and N are integers greater than one.

Abstract: A video display includes a scanner operable at a first frequency and a higher second frequency. A switch mode power supply drives a transformer with three secondaries. First and second rectifiers & filters are associated with the first and second secondaries. A rectifier is coupled to the third secondary and by way of a switch to the first filter. Feedback from the first filter controls the SMPS. In a first operating mode, the scanner is operated at the first frequency, the switch is open, the scanner supply is a first voltage from the first filter, and ancillary equipment is supplied with a third voltage by the second filter. In a second operating mode, the scanner is operated at the second frequency, the switch is closed, the scanner supply is a second voltage, higher than the first, from the first filter, and ancillary equipment is supplied with the same third voltage.