Patents by Inventor Robert Haas
Robert Haas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8972662Abstract: The population of data to be inserted into secondary data storage cache is controlled by determining a heat metric of candidate data; adjusting a heat metric threshold; rejecting candidate data provided to the secondary data storage cache whose heat metric is less than the threshold; and admitting candidate data whose heat metric is equal to or greater than the heat metric threshold. The adjustment of the heat metric threshold is determined by comparing a reference metric related to hits of data most recently inserted into the secondary data storage cache, to a reference metric related to hits of data most recently evicted from the secondary data storage cache; if the most recently inserted reference metric is greater than the most recently evicted reference metric, decrementing the threshold; and if the most recently inserted reference metric is less than the most recently evicted reference metric, incrementing the threshold.Type: GrantFiled: April 26, 2012Date of Patent: March 3, 2015Assignee: International Business Machines CorporationInventors: Michael T. Benhase, Stephen L. Blinick, Evangelos S. Eleftheriou, Lokesh M. Gupta, Robert Haas, Xiao-Yu Hu, Ioannis Koltsidas, Roman A. Pletka
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Patent number: 8972661Abstract: The population of data to be inserted into secondary data storage cache is controlled by determining a heat metric of candidate data; adjusting a heat metric threshold; rejecting candidate data provided to the secondary data storage cache whose heat metric is less than the threshold; and admitting candidate data whose heat metric is equal to or greater than the heat metric threshold. The adjustment of the heat metric threshold is determined by comparing a reference metric related to hits of data most recently inserted into the secondary data storage cache, to a reference metric related to hits of data most recently evicted from the secondary data storage cache; if the most recently inserted reference metric is greater than the most recently evicted reference metric, decrementing the threshold; and if the most recently inserted reference metric is less than the most recently evicted reference metric, incrementing the threshold.Type: GrantFiled: October 31, 2011Date of Patent: March 3, 2015Assignee: International Business Machines CorporationInventors: Michael T. Benhase, Stephen L. Blinick, Evangelos S. Eleftheriou, Lokesh M. Gupta, Robert Haas, Xiao-Yu Hu, Ioannis Koltsidas, Roman A. Pletka
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Publication number: 20150052413Abstract: It is provided a method for decoding a sequence of bits encoded by a LPDC code. The method comprises providing a set of bit states, including a first state and a second state, and a set of conditions to change a bit state including a first condition 5 and a second condition. The first condition and the second condition are different. The method comprises reading the value of each bit of the sequence, associating each bit to a respective state of the set according to the values as read, determining that an evaluated condition is met and changing the state of the target bit as a result of the condition being met. The method may then set the value of the target bit of the 10 sequence according to the state thereof. Such a method provides a solution for decoding a sequence of bits encoded by a LDPC code with better performance than the classic bit-flipping algorithm with only a slight increase in complexity.Type: ApplicationFiled: May 25, 2011Publication date: February 19, 2015Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Evangelos S. Eleftheriou, Robert Haas, Xiao-Yu Hu, Dung Nguyen
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Patent number: 8954652Abstract: In a method for identifying a unit in a solid state memory device for writing data to a tier structure is maintained the tier structure comprising at least two tiers for assigning units available for writing data to. In response to receiving a request for writing data it is determined if a unit for writing data to is available in a first tier of the at least two tiers. In response to determining that a unit is available for writing data to in the first tier this unit is identified for writing data to, and in response to determining that no unit is available for writing the data to in the first tier it is determined if a unit is available for writing data to in a second tier of the at least two tiers subject to a priority of the write request.Type: GrantFiled: June 11, 2012Date of Patent: February 10, 2015Assignee: International Business Machines CorporationInventors: Robert Haas, Roman Pletka
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Patent number: 8938662Abstract: A data storage system includes a data storage array configured for de-duplication of duplicate data therein by: identification of a plurality of portions of data; a comparison of each portion of the data to identify duplicate data and identification of a link associated with each duplicate data; a determination of whether a Hamming link-separation-distance of the identified link is greater than twice a Hamming radius of an error correction code in the data storage system; and replacement of the duplicate data with the identified link when it is determined that the Hamming link-separation-distance is greater than twice the Hamming radius.Type: GrantFiled: April 23, 2012Date of Patent: January 20, 2015Assignee: International Business Machines CorporationInventors: Robert Haas, Nils Haustein, Craig Anthony Klein, Ulf Troppens, Daniel James Winarski
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Patent number: 8935462Abstract: For efficient track destage in secondary storage in a more effective manner, for temporal bits employed with sequential bits for controlling the timing for destaging the track in a primary storage, the temporal bits and sequential bits are transferred from the primary storage to the secondary storage. The temporal bits are allowed to age on the secondary storage.Type: GrantFiled: March 14, 2013Date of Patent: January 13, 2015Assignee: International Business Machines CorporationInventors: Michael T. Benhase, Stephen L. Blinick, Evangelos S. Eleftheriou, Lokesh M. Gupta, Robert Haas, Xiao-Yu Hu, Matthew J. Kalos, Ioannis Koltsidas, Karl A. Nielsen, Roman A. Pletka
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Patent number: 8935479Abstract: Provided are a computer program product, system, and method for managing data in a first cache and a second cache. A reference count is maintained in the second cache for the page when the page is stored in the second cache. It is determined that the page is to be promoted from the second cache to the first cache. In response to determining that the reference count is greater than zero, the page is added to a Least Recently Used (LRU) end of an LRU list in the first cache. In response to determining that the reference count is less than or equal to zero, the page is added to a Most Recently Used (LRU) end of the LRU list in the first cache.Type: GrantFiled: May 8, 2012Date of Patent: January 13, 2015Assignee: International Business Machines CorporationInventors: Michael T. Benhase, Stephen L. Blinick, Evangelos S. Eleftheriou, Lokesh M. Gupta, Robert Haas, Xiao-Yu Hu, Ioannis Koltsidas, Roman A. Pletka
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Patent number: 8930624Abstract: Provided are a computer program product, system, and method for managing data in a first cache and a second cache. A reference count is maintained in the second cache for the page when the page is stored in the second cache. It is determined that the page is to be promoted from the second cache to the first cache. In response to determining that the reference count is greater than zero, the page is added to a Least Recently Used (LRU) end of an LRU list in the first cache. In response to determining that the reference count is less than or equal to zero, the page is added to a Most Recently Used (LRU) end of the LRU list in the first cache.Type: GrantFiled: March 5, 2012Date of Patent: January 6, 2015Assignee: International Business Machines CorporationInventors: Michael T. Benhase, Stephen L. Blinick, Evangelos S. Eleftheriou, Lokesh M. Gupta, Robert Haas, Xiao-Yu Hu, Ioannis Koltsidas, Roman A. Pletka
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Patent number: 8924513Abstract: A pseudo peer-to-peer network system including several clients, each adapted to execute a path driver program. A path driver program is provided, including the steps of locating storage peers connected to the network via a network interface for storing or accessing data items provided in memories of storage peers by means of a global address table. The global address table is updated periodically by at least one configuration server of the pseudo peer-to-peer network. The network further includes at least one time server, which generates a global time clock to which local time clocks of all storage peers of the pseudo peer-to-peer network are synchronized such that a global address table updated by the configuration server is activated by all storage peers at the same scheduled time to be consistent throughout the pseudo peer-to-peer network at all times.Type: GrantFiled: July 7, 2010Date of Patent: December 30, 2014Assignee: International Business Machines CorporationInventors: Evangelos S Eleftheriou, Robert Haas, Xiaoyu Hu, Ilias Iliadis
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Patent number: 8909831Abstract: A logic device for communicating with a memory package with a first protocol, communicating with a memory controller with a second protocol, and for performing a protocol conversion between the first and the second protocol.Type: GrantFiled: November 19, 2010Date of Patent: December 9, 2014Assignee: International Business Machines CorporationInventors: Evangelos S. Eleftheriou, Robert Haas, Xiaoyu Hu, Peter Mueller
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Publication number: 20140359309Abstract: The invention notably relates to a computerized system (301) comprising a storage system (302, 308) storing objects and attribute values associated to the objects. The attribute values are organized according to a set of N attribute types, N?1, such that, for each of said attribute types, an object can be associated with an attribute value. Each of said attribute types is associated to a respective graph. Each node of the respective graph is associated to a key. Said key is wrapped with a key associated to a parent node of said each node except for a root node. Also, said key is associated to one attribute value for the attribute type associated to the respective graph. Each of the objects is stored encrypted based on one or more keys. Each of said one or more keys is associated to one attribute value that is associated with said each of the objects. Such a system improves the deletion of objects stored on a storage system of a computerized system.Type: ApplicationFiled: November 16, 2012Publication date: December 4, 2014Inventors: Christian Cachin, Robert Haas, Alexis Hafner, Anil Kurmus, Alessandro Sorniotti
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Patent number: 8904261Abstract: A mechanism is provided for controlling a solid state storage device in which the solid state storage comprises erasable blocks each comprising a plurality of data write locations. Input data is stored in successive groups of data write locations, each group comprising write locations in a set of erasable blocks in each of a plurality of logical subdivisions of the solid state storage. The input data is error correction encoded such that each group contains an error correction code for the input data in that group. Metadata, indicating the location of input data in the solid state storage, is maintained in memory. An indication of validity of data stored in each data write location is also maintained. Prior to erasing a block, valid input data is recovered from the each said group containing write locations in that block. The recovered data is then re-stored as new input data.Type: GrantFiled: December 16, 2010Date of Patent: December 2, 2014Assignee: International Business Machines CorporationInventors: Roy D. Cideciyan, Evangelos S. Eleftheriou, Robert Haas, Xiao-Yu Hu, Ilias Iliadis
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Publication number: 20140330817Abstract: A tape drive system server includes a non-volatile memory used as a cache memory for storing data files, at least part of the cache memory comprising a first region managed using a First In First Out policy management and a second region managed using a Least Recently Used policy management; a file system interface for interacting with data files stored on a tape drive system; an interface for allowing one or more remote systems reading and writing data stored on the cache memory; the server configured to: receive from the one or more remote systems one or more write requests for writing one or more data files; interpret attributes associated to data files instructed to be written by the one or more remote systems; and store data files instructed to be written by the remote systems according to the interpreted attributes.Type: ApplicationFiled: November 20, 2012Publication date: November 6, 2014Applicant: International Business Machines CorporationInventors: Evangelos S. Eleftheriou, Robert Haas, Nils Haustein, Jens Jelitto, Ioannis Koltsidas, Slavisa Sarafijanovic, Alexander Saupp, Harald Seipp
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Patent number: 8874993Abstract: A non-volatile solid state memory device and method for balancing write/erase cycles among blocks to level block usage. The non-volatile solid state memory device includes a memory unit having data stored therein and a controller with logic for programming the memory unit according to a monitored occurrence of an error during a read operation. The method includes monitoring an occurrence of an error during a read operation in a memory unit of the device and programming the memory unit according to the monitored occurrence of the error.Type: GrantFiled: January 2, 2013Date of Patent: October 28, 2014Assignee: International Business Machines CorporationInventors: Evangelos S Eleftheriou, Ilias Iliadis, Robert Haas, Xiaoyu Hu
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Patent number: 8862815Abstract: A system and method for reading files stored on a storage system is disclosed. The method includes communicatively coupling one or more remote systems for reading files stored in storage with a first set of files according to a predetermined data format and in a cache memory with a second set of files, the second set of files being a subset of the first set of files. Next one or more remote systems are received at least one read request for reading a sequence of files. A determination is made, among the files of the sequence of files, whether one or more cached files are already stored in the cache memory and whether one or more remaining files are not already stored in the cache memory. Creating, within the one or more remaining files, an order according to which the remaining files should be read on the storage system.Type: GrantFiled: November 16, 2012Date of Patent: October 14, 2014Assignee: International Business Machines CorporationInventors: Evangelos S. Eleftheriou, Robert Haas, Nils Haustein, Jens Jelitto, Ioannis Koltsidas, Slavisa Sarafijanovic, Alexander Saupp, Harald Seipp
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Patent number: 8825617Abstract: Data for deduplication is received. The received data is deduplicated if selected conditions corresponding to the deduplication are satisfied, wherein the selected conditions include a deduplication ratio, a data deduplication threshold, and a data quiescence measure. Deduplication of the received data is discontinued if the selected conditions corresponding to the deduplication are not satisfied.Type: GrantFiled: March 14, 2008Date of Patent: September 2, 2014Assignee: International Business Machines CorporationInventors: Robert Haas, Nils Haustein, Craig Anthony Klein, Ulf Troppens, Daniel James Winarski
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Patent number: 8799561Abstract: A method for garbage collection in a solid state drive (SSD) includes determining whether the SSD is idle by a garbage collection module of the SSD; based on determining that the SSD is idle, determining a victim block from a plurality of memory blocks of the SSD; determining a number of valid pages in the victim block; comparing the determined number of valid pages in the victim block to a valid page threshold; and based on the number of valid pages in the victim block being less than the valid page threshold, issuing a garbage collection request for the victim block.Type: GrantFiled: July 27, 2012Date of Patent: August 5, 2014Assignee: International Business Machines CorporationInventors: Werner Bux, Robert Haas, Xiao-Yu Hu, Ilias Iliadis
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Publication number: 20140201448Abstract: For movement of partial data segments within a computing storage environment having lower and higher levels of cache by a processor, a whole data segment containing one of the partial data segments is promoted to both the lower and higher levels of cache. Requested data of the whole data segment is split and positioned at a Most Recently Used (MRU) portion of a demotion queue of the higher level of cache.Type: ApplicationFiled: March 18, 2014Publication date: July 17, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. BENHASE, Stephen L. BLINICK, Evangelos S. ELEFTHERIOU, Lokesh M. GUPTA, Robert HAAS, Xiao-Yu HU, Matthew J. KALOS, Ioannis KOLTSIDAS, Roman A. PLETKA
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Publication number: 20140181383Abstract: In one embodiment, a method of managing data includes managing a first copy of data in a solid state memory using a controller of the solid state memory, and managing a second copy of the data in a hard disk drive memory using the controller. In another embodiment, a system for storing data includes a solid state memory, at least one hard disk drive memory, and a controller for controlling storage of data in both the solid state memory and the hard disk drive memory. Other methods, systems, and computer program products are also described according to various embodiments.Type: ApplicationFiled: February 28, 2014Publication date: June 26, 2014Applicant: International Business Machines CorporationInventors: Evangelos S. Eleftheriou, Robert Haas, Xiao-Yu Hu, Roman A. Pletka
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Patent number: 8725957Abstract: Exemplary embodiments include a method for reducing access contention in a flash-based memory system, the method including selecting a chip stripe in a free state, from a memory device having a plurality of channels and a plurality of memory blocks, wherein the chip stripe includes a plurality of pages, setting the ship stripe to a write state, setting a write queue head in each of the plurality of channels, for each of the plurality of channels in the flash stripe, setting a write queue head to a first free page in a chip belonging to the channel from the chip stripe, allocating write requests according to a write allocation scheduler among the channels, generating a page write and in response to the page write, incrementing the write queue head, and setting the chip stripe into an on-line state when it is full.Type: GrantFiled: August 1, 2012Date of Patent: May 13, 2014Assignee: International Business Machines CorporationInventors: Evangelos S. Eleftheriou, Robert Haas, Peter Mueller, Roman A. Pletka