Abstract: An apparatus is disclosed. The apparatus comprises a primary power supply (PPS) configured to supply primary power, a PPS sensor configured to measure the power supplied by the PPS and provide a PPS measurement signal indicating an amount of the power supplied by the PPS, a backup power supply (BPS) configured to be provided in an emergency data system and further configured to supply backup power to a modem, and an integrated circuit configured to maintain a clock using the power supplied by the PPS. The integrated circuit is configured to receive the PPS measurement signal from the PPS sensor, determine whether the PPS measurement signal falls below a threshold, and maintain the clock using the power supplied by the BPS in response to a determination that the PPS measurement signal has fallen below the threshold.

Abstract: An apparatus is disclosed. The apparatus comprises a primary power supply (PPS) configured to supply primary power, a PPS sensor configured to measure the power supplied by the PPS and provide a PPS measurement signal indicating an amount of the power supplied by the PPS, a backup power supply (BPS) configured to be provided in an emergency data system and further configured to supply backup power to a modem, and an integrated circuit configured to maintain a clock using the power supplied by the PPS. The integrated circuit is configured to receive the PPS measurement signal from the PPS sensor, determine whether the PPS measurement signal falls below a threshold, and maintain the clock using the power supplied by the BPS in response to a determination that the PPS measurement signal has fallen below the threshold.

Abstract: An apparatus is disclosed. The apparatus comprises a primary power supply (PPS) configured to supply primary power, a PPS sensor configured to measure the power supplied by the PPS and provide a PPS measurement signal indicating an amount of the power supplied by the PPS, a backup power supply (BPS) configured to be provided in an emergency data system and further configured to supply backup power to a modem, and an integrated circuit configured to maintain a clock using the power supplied by the PPS. The integrated circuit is configured to receive the PPS measurement signal from the PPS sensor, determine whether the PPS measurement signal falls below a threshold, and maintain the clock using the power supplied by the BPS in response to a determination that the PPS measurement signal has fallen below the threshold.

Abstract: Certain aspects of the present disclosure generally relate to testing functionality of the display system. An example method generally includes selecting a first data integrity check value, associated with a region of interest (ROI) of an input frame, among a set of data integrity check values stored on a memory device, the data integrity check values are associated with an animation comprising a plurality of frames, and at least one of the frames of the animation corresponds to the input frame; processing, with a display processor, the input frame; calculating a second data integrity check value on the ROI of the input frame after the display processor processes the input frame; comparing, with a comparator, the data integrity check values; and generating, with the comparator, an interrupt if the comparison indicates that the values do not match.

Abstract: Systems and method for error detection in automobile tell-tales are provided. An initial cyclic redundancy check (CRC) for a tell-tale to be calculated and stored at a primary control system within the vehicle. When a fault or condition is detected which generates the tell-tale, the primary control system passes video information to a display embedded control unit (ECU) along with the initial CRC. A circuit in the display ECU performs its own CRC calculation and compares the initial CRC to the calculated CRC. If there is not a match, then a fault indication may be provided to the primary control system for action by the primary control system. Still further, back up or fail-operational options may be invoked so that the tell-tale is provided to the operator.

Abstract: Systems, methods, and apparatus for communicating video data in packed frames are described. The video data corresponds to multiple asymmetrical display devices, and the packed frames are transmitted through a single display port. In one example a method includes receiving video data targeted to multiple display devices, the data for each display being provided as a set of scanlines for display at a first clock rate, inserting padded scanlines into the set of scanlines to obtain a padded set of scanlines that includes the same number of scanlines a second display device, generating a packed frame by combining the padded set of scanlines with the set of scanlines corresponding to the second display device, and transmitting the packed frame over a communication link. The display devices may have different resolutions. The location of each padded scanline in the padded set of scanlines is identified by configuration information.

Abstract: Systems and method for a host-driven data refresh of a Flash memory include registers provided in the Flash memory for storing various settings related to refresh operations, such as, when to start/stop refreshing, target partitions in the memory, target start/end address ranges for refreshing, refresh algorithms, refresh rate requirements, etc. A host can control the various settings for start/stop refreshing, target partitions in the memory, target start/end address ranges for refreshing, refresh algorithms, through the corresponding registers; and the Flash memory can control various values related to refresh rate requirements through corresponding registers. In this manner, a standard platform or interface is provided within the Flash memory for refresh operations thereof.

Abstract: An apparatus is disclosed. The apparatus comprises a primary power supply (PPS) configured to supply primary power, a PPS sensor configured to measure the power supplied by the PPS and provide a PPS measurement signal indicating an amount of the power supplied by the PPS, a backup power supply (BPS) configured to be provided in an emergency data system and further configured to supply backup power to a modem, and an integrated circuit configured to maintain a clock using the power supplied by the PPS. The integrated circuit is configured to receive the PPS measurement signal from the PPS sensor, determine whether the PPS measurement signal falls below a threshold, and maintain the clock using the power supplied by the BPS in response to a determination that the PPS measurement signal has fallen below the threshold.

Abstract: Alternative display options for vehicle telltales are disclosed. In one aspect, a fault condition in a telltale is detected, and the telltale is presented through a secondary display system in the vehicle, potentially bypassing any local control unit for the secondary display system. For example, a video telltale may be presented on an infotainment display after detection of a fault in the original telltale. By presenting the telltale in an alternate display, the operator remains informed of sensor conditions in the automobile and may take remedial action to fix the fault as well as any conditions which trigger a telltale.

Abstract: Systems and method for error detection in automobile tell-tales are provided. An initial cyclic redundancy check (CRC) for a tell-tale to be calculated and stored at a primary control system within the vehicle. When a fault or condition is detected which generates the tell-tale, the primary control system passes video information to a display embedded control unit (ECU) along with the initial CRC. A circuit in the display ECU performs its own CRC calculation and compares the initial CRC to the calculated CRC. If there is not a match, then a fault indication may be provided to the primary control system for action by the primary control system. Still further, back up or fail-operational options may be invoked so that the tell-tale is provided to the operator.

Abstract: Methods and systems to broadcast sensor outputs in an automotive environment allow sensors such as cameras to output relatively unprocessed (raw) data to two or more different processing circuits where the processing circuits are located in separate and distinct embedded control units (ECUs). A first one of the two or more different processing circuits processes the raw data for human consumption. A second one of the two or more different processing circuits processes the raw data for machine utilization such as for autonomous driving functions. Such an arrangement allows for greater flexibility in utilization of the data from the sensors without imposing undue latency in the processing stream and without compromising key performance indices for human use and machine use.

Abstract: Alternative display options for vehicle telltales are disclosed. In one aspect, a fault condition in a telltale is detected, and the telltale is presented through a secondary display system in the vehicle, potentially bypassing any local control unit for the secondary display system. For example, a video telltale may be presented on an infotainment display after detection of a fault in the original telltale. By presenting the telltale in an alternate display, the operator remains informed of sensor conditions in the automobile and may take remedial action to fix the fault as well as any conditions which trigger a telltale.

Abstract: Systems and method for a host-driven data refresh of a Flash memory include registers provided in the Flash memory for storing various settings related to refresh operations, such as, when to start/stop refreshing, target partitions in the memory, target start/end address ranges for refreshing, refresh algorithms, refresh rate requirements, etc. A host can control the various settings for start/stop refreshing, target partitions in the memory, target start/end address ranges for refreshing, refresh algorithms, through the corresponding registers; and the Flash memory can control various values related to refresh rate requirements through corresponding registers. In this manner, a standard platform or interface is provided within the Flash memory for refresh operations thereof.

Abstract: Systems and method for a host-driven data refresh of a Flash memory include registers provided in the Flash memory for storing various settings related to refresh operations, such as, when to start/stop refreshing, target partitions in the memory, target start/end address ranges for refreshing, refresh algorithms, refresh rate requirements, etc. A host can control the various settings for start/stop refreshing, target partitions in the memory, target start/end address ranges for refreshing, refresh algorithms, through the corresponding registers; and the Flash memory can control various values related to refresh rate requirements through corresponding registers. In this manner, a standard platform or interface is provided within the Flash memory for refresh operations thereof.

Abstract: Systems, methods, and apparatus for communicating video data in packed frames are described. The video data corresponds to multiple asymmetrical display devices, and the packed frames are transmitted through a single display port. In one example a method includes receiving video data targeted to multiple display devices, the data for each display being provided as a set of scanlines for display at a first clock rate, inserting padded scanlines into the set of scanlines to obtain a padded set of scanlines that includes the same number of scanlines a second display device, generating a packed frame by combining the padded set of scanlines with the set of scanlines corresponding to the second display device, and transmitting the packed frame over a communication link. The display devices may have different resolutions. The location of each padded scanline in the padded set of scanlines is identified by configuration information.

Abstract: Systems and methods are disclosed for error correction control (ECC) for a memory device comprising a data portion and an ECC portion, the memory device coupled to a system on a chip (SoC). The SoC includes an ECC cache. On receipt of a request to write a line of data to the memory, a determination is made if the data is compressible. If so, the data line is compressed. ECC bits are generated for the compressed or uncompressed data line. A determination is made if an ECC cache line is associated with the received data line. If the data line is compressible, the ECC bits are appended to the compressed data line and the appended data line is stored in the data portion of the memory. Otherwise, the ECC bits are stored in the ECC cache and the data line is stored in the data portion of the memory.

Abstract: Herein, a display device, system and method are described for identifying digital content through comparison of one or more audio thumbnails when the digital content is provided without metadata. According to one embodiment, a display device comprises a display, audio conversion logic and a transceiver. The audio conversion logic is adapted to produce one or more audio thumbnails, which are compact representations of a snippet of audio from that incoming digital content without the metadata. The transceiver is adapted to transmit the one or more audio thumbnails in order to (i) retrieve metadata associated with the digital content from an external source separate from a source of the digital content and (ii) display information provided by the metadata on the display.

Abstract: Techniques for personalizing audio levels, in accordance with embodiments of the present technology, provide different audio volumes to different locations in a room allowing for two of more users to enjoy the same audio content at different volumes. Differential level and delay compensation filtering based on a position of each of a plurality of speakers, the location of each user and the preferred relative audio volume of each user are utilized to produce different effective audio levels in localized regions of a room.

Abstract: Systems and method for a host-driven data refresh of a Flash memory include registers provided in the Flash memory for storing various settings related to refresh operations, such as, when to start/stop refreshing, target partitions in the memory, target start/end address ranges for refreshing, refresh algorithms, refresh rate requirements, etc. A host can control the various settings for start/stop refreshing, target partitions in the memory, target start/end address ranges for refreshing, refresh algorithms, through the corresponding registers; and the Flash memory can control various values related to refresh rate requirements through corresponding registers. In this manner, a standard platform or interface is provided within the Flash memory for refresh operations thereof.

Abstract: Systems and methods are disclosed for error correction control (ECC) for a memory device comprising a data portion and an ECC portion, the memory device coupled to a system on a chip (SoC). The SoC includes an ECC cache. On receipt of a request to write a line of data to the memory, a determination is made if the data is compressible. If so, the data line is compressed. ECC bits are generated for the compressed or uncompressed data line. A determination is made if an ECC cache line is associated with the received data line. If the data line is compressible, the ECC bits are appended to the compressed data line and the appended data line is stored in the data portion of the memory. Otherwise, the ECC bits are stored in the ECC cache and the data line is stored in the data portion of the memory.