Abstract: A multiplier and corresponding method are provided for amplifying a voltage difference between a first input voltage and a second input voltage, the multiplier being implemented with Bipolar Junction Transistor technology having high emitter resistance. The multiplier includes a first bipolar input transistor having high emitter resistance that receives the first input voltage and a second bipolar input transistor having high emitter resistance that receives the second input voltage. The multiplier also includes a first current source for generating a first current that flows through said first bipolar input transistor, a current mirror for producing a second current that is substantially equal to said first current and flows through said second bipolar input transistor.

Abstract: A supply and temperature dependent linear signal generating circuit includes four transistors each having a unique current flowing therethrough and connected together to form a current multiplier. A first one of the currents is designed to be supply dependent and preferably adjustable in magnitude, a second one is designed to exhibit a specific temperature dependence, the third is designed to be both supply and temperature independent and the fourth current is defined as a ratio of the first three. The fourth current is, in one embodiment, impressed upon a network defined by a resistor divider and a voltage source to thereby define an output voltage V(T) that is both supply and temperature dependent according to the following equation:V(T)=KX*(T-TN),wherein KX is the slope of V(T) over temperature, T is the operating temperature and TN is a reference temperature at which V(T) is equal to zero. Preferably, TN is adjustable via the adjustable magnitude of the first current.

Abstract: A memory cell having programming voltage margin verification is provided. The memory cell includes a voltage comparator having a differential input with first and second inputs and bias circuitry for generating a differential input voltage. A voltage offset is applied to the second input of the comparator to provide an input offset voltage. A programming voltage is received for programming the memory cell and the memory cell provides an output signal. To verify an unprogrammed state voltage margin of the memory cell, a margin detection circuitry receives a verification check signal and the output is monitored to determine whether the unprogrammed state voltage margin is proper. To verify a proper programmed state voltage margin of the memory cell, current is sensed through the programming input and a determination of a proper programmed state voltage margin is determined as a function of the sensed current.