Abstract: A wafer stage overlay error map is created using standard overlay targets and a special numerical algorithm. A reticle including a 2-dimensional array of standard overlay targets is exposed several times onto a photoresist coated silicon wafer using a photolithographic exposure tool. After exposure, the overlay targets are measured for placement error using a conventional overlay metrology tool. The resulting overlay error data is then supplied to a software program that generates a 2-dimensional wafer stage distortion and yaw overlay error map.

Abstract: A wafer stage overlay error map is created using standard overlay targets and a special numerical algorithm. A reticle including a 2-dimensional array of standard overlay targets is exposed several times onto a photoresist coated silicon wafer using a photolithographic exposure tool. After exposure, the overlay targets are measured for placement error using a conventional overlay metrology tool. The resulting overlay error data is then supplied to a software program that generates a 2-dimensional wafer stage distortion and yaw overlay error map.

Abstract: An apparatus and method for manufacturing and using a calibrated registration reference wafer in a semiconductor manufacturing facility. A reference reticle consisting of a 2-dimensional array of standard alignment attributes is exposed several times onto a photoresist coated semiconductor wafer using a photolithographic exposure tool. After the final steps of the lithographic development process the resist patterned wafer is physically etched using standard techniques to create a permanent record of the alignment attribute exposure pattern. The permanently recorded alignment attributes are measured for placement error using a conventional overlay metrology tool. The resulting overlay error data is used to generate a calibration file that contains the positions of the alignment attributes on the reference wafer. The reference wafer and calibration file can be used to determine the wafer stage registration performance for any photolithographic exposure tool.

Abstract: A projection lens distortion error map is created using overlay targets and a special numerical algorithm. A reticle including an array of overlay targets is exposed several times onto a photoresist coated silicon wafer using a photolithographic stepper. After exposure, the overlay targets are measured for placement error. The resulting overlay error data is then supplied to a software program that generates a lens distortion error map for the photolithographic projection system.

Abstract: A wafer stage overlay error map is created using standard overlay targets and a special numerical algorithm. A reticle including a 2-dimensional array of standard overlay targets is exposed several times onto a photoresist coated silicon wafer using a photolithographic exposure tool. After exposure, the overlay targets are measured for placement error using a conventional overlay metrology tool. The resulting overlay error data is then supplied to a software program that generates a 2-dimensional wafer stage distortion and yaw overlay error map.

Abstract: An apparatus and method for manufacturing and using a calibrated registration reference wafer in a semiconductor manufacturing facility. A reference reticle consisting of a 2-dimensional array of standard alignment attributes is exposed several times onto a photoresist coated semiconductor wafer using a photolithographic exposure tool. After the final steps of the lithographic development process the resist patterned wafer is physically etched using standard techniques to create a permanent record of the alignment attribute exposure pattern. The permanently recorded alignment attributes are measured for placement error using a conventional overlay metrology tool. The resulting overlay error data is used to generate a calibration file that contains the positions of the alignment attributes on the reference wafer. The reference wafer and calibration file can be used to determine the wafer stage registration performance for any photolithographic exposure tool.

Abstract: A projection lens distortion error map is created using standard overlay targets and a special numerical algorithm. A reticle including a 2-dimensional array of standard overlay targets is exposed several times onto a photoresist coated silicon wafer using a photolithographic stepper. After exposure, the overlay targets are measured for placement error using a conventional overlay metrology tool. The resulting overlay error data is then supplied to a software program that generates a lens distortion error map for the photolithographic projection system.