Patents by Inventor Robert Isham
Robert Isham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8305067Abstract: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.Type: GrantFiled: February 11, 2011Date of Patent: November 6, 2012Assignee: Intersil Americas Inc.Inventors: Chun Cheung, Weihong Qui, Robert Isham
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Patent number: 8115468Abstract: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.Type: GrantFiled: February 11, 2011Date of Patent: February 14, 2012Assignee: Intersil Americas Inc.Inventors: Chun Cheung, Weihong Qui, Robert Isham
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Publication number: 20110133716Abstract: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.Type: ApplicationFiled: February 11, 2011Publication date: June 9, 2011Applicant: INTERSIL AMERICAS INC.Inventors: Chun Cheung, Weihong Qiu, Robert Isham
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Publication number: 20110133717Abstract: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.Type: ApplicationFiled: February 11, 2011Publication date: June 9, 2011Applicant: INTERSIL AMERICAS INC.Inventors: Chun Cheung, Weihong Qui, Robert Isham
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Patent number: 7911194Abstract: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.Type: GrantFiled: July 21, 2010Date of Patent: March 22, 2011Assignee: Intersil Americas Inc.Inventors: Chun Cheung, Weihong Qui, Robert Isham
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Patent number: 7898310Abstract: A phase doubler driver circuit includes first control logic generates a first output PWM drive signal and a second output PWM drive signal responsive to an input PWM drive signal. In a first mode of operation, alternating pulses of the input PWM drive are output as the first output PWM drive signal and the second PWM output drive signal respectively. In a second mode of operation, the input PWM drive signal is provided as the first output PWM drive signal when a second phase current associated with the second output PWM drive signal exceeds a first phase current associated with the first output PWM drive signal and the input PWM drive signal is provided as the second output PWM drive signal when the phase current associated with the first output PWM signal exceed the phase current associated with the second output PWM signal.Type: GrantFiled: April 24, 2009Date of Patent: March 1, 2011Assignee: Intersil Americas Inc.Inventors: Weihong Qui, Chun Cheung, Emil Chen, Paul Sferrazza, Robert Isham
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Publication number: 20100283523Abstract: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.Type: ApplicationFiled: July 21, 2010Publication date: November 11, 2010Applicant: INTERSIL AMERICAS INC.Inventors: Chun Cheung, Weihong Qiu, Robert Isham
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Patent number: 7800352Abstract: A modulation controller includes an error amplifier which receives a reference voltage and an output voltage (VOUT) from a switching regulator being controlled by the controller at its inputs and provides a VCOMP signal at its output, and at least one comparator, wherein a first input of the comparator is coupled to an output of the error amplifier and a second input coupled to receive a ramp signal. A VCOMP shift cancellation circuit is interposed between the first or second input of the comparator, wherein the VCOMP shift cancellation circuit improves diode conduction mode performance (DCM) of the regulator by reducing a variation in average VCOMP.Type: GrantFiled: July 16, 2007Date of Patent: September 21, 2010Assignee: Intersil Americas Inc.Inventors: Weihong Qiu, Robert Isham
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Patent number: 7782035Abstract: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.Type: GrantFiled: November 6, 2007Date of Patent: August 24, 2010Assignee: Intersil Americas Inc.Inventors: Chun Cheung, Weihong Qiu, Robert Isham
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Publication number: 20100079175Abstract: A phase doubler driver circuit includes a first input for receiving a input PWM drive signal. First control logic generates a first output PWM drive signal and a second output PWM drive signal responsive to the input PWM drive signal. In a first mode of operation, alternating pulses of the input PWM drive are output as the first output PWM drive signal and the second PWM output drive signal respectively. In a second mode of operation, the input PWM drive signal is provided as the first output PWM drive signal when a second phase current associated with the second output PWM drive signal exceeds a first phase current associated with the first output PWM drive signal and the input PWM drive signal is provided as the second output PWM drive signal when the phase current associated with the first output PWM signal exceed the phase current associated with the second output PWM signal.Type: ApplicationFiled: April 24, 2009Publication date: April 1, 2010Applicant: INTERSIL AMERICAS INC.Inventors: Weihong Qiu, Chun Cheung, Emil Chen, Paul Sferrazza, Robert Isham
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Publication number: 20080284398Abstract: A modulation controller includes an error amplifier which receives a reference voltage and an output voltage (VOUT) from a switching regulator being controlled by the controller at its inputs and provides a VCOMP signal at its output, and at least one comparator, wherein a first input of the comparator is coupled to an output of the error amplifier and a second input coupled to receive a ramp signal. A VCOMP shift cancellation circuit is interposed between the first or second input of the comparator, wherein the VCOMP shift cancellation circuit improves diode conduction mode performance (DCM) of the regulator by reducing a variation in average VCOMP.Type: ApplicationFiled: July 16, 2007Publication date: November 20, 2008Inventors: Weihong Qiu, Robert Isham
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Publication number: 20080238392Abstract: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.Type: ApplicationFiled: November 6, 2007Publication date: October 2, 2008Applicant: INTERSIL AMERICAS INC.Inventors: Chun Cheung, Weihong Qiu, Robert Isham
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Publication number: 20070146006Abstract: A multi-function circuit has as single input/control pin, to which respectively different values of a control input may be applied. A multi-function signal generation section is coupled to the single input/control pin and is operative to controllably generate a plurality of respectively different functional outputs, including a decoded address bit-representative output, a soft-start oscillator signal output, and a reset output, in response to application of respectively different values of the control input.Type: ApplicationFiled: February 21, 2006Publication date: June 28, 2007Applicant: Intersil Americas Inc.Inventors: Noel Dequina, Robert Isham
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Publication number: 20070108954Abstract: A PWM control circuit for a voltage regulator including a compensation network, a ramp generator providing a ramp voltage, an offset adjust circuit and a comparator circuit. The compensation network senses the output voltage, receives a reference voltage, and outputs a compensation voltage. The offset adjust circuit adjusts a selected one of the ramp voltage and the compensation voltage based on the reference voltage. The comparator circuit compares the compensation voltage with the ramp voltage and provides a PWM signal for controlling the output voltage. The offset adjust circuit may generate an offset voltage based on the reference voltage and a gain G of the voltage regulator. The offset adjust circuit may subtract the offset voltage from either the ramp voltage or the compensation voltage to provide an adjusted voltage to the comparator circuit.Type: ApplicationFiled: March 31, 2006Publication date: May 17, 2007Applicant: Intersil Americas Inc.Inventors: Weihong Qiu, Robert Isham, Zhixiang Liang
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Publication number: 20070109825Abstract: An adaptive pulse positioning system for a voltage converter providing an output voltage, the system including a PWM generation circuit, a sensor, and a pulse positioning circuit. The PWM generation circuit generates a PWM signal with PWM pulses for controlling the output voltage of the voltage controller. The sensor senses an output load condition of the voltage converter and provides a load signal indicative thereof. The pulse positioning circuit adaptively positions the PWM pulses based on the load signal. A method of adaptively positioning PWM pulses that are used to control an output voltage of a voltage regulator including generating a series of PWM pulses based on a clock signal, sensing an output load condition, and adaptively shifting the series of PWM pulses based on the output load condition.Type: ApplicationFiled: May 17, 2006Publication date: May 17, 2007Applicant: INTERSIL AMERICAS INC.Inventors: Weihong Qiu, Robert Isham, Zhixiang Liang
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Publication number: 20070013356Abstract: A dual-edge modulation controller including first and second ramp circuits, first and second comparators, an error amplifier and pulse control logic. The first ramp circuit provides a leading-edge ramp synchronous with a clock. The error amplifier compares a feedback signal with a reference and provides a compensation signal. The first comparator compares the leading-edge ramp with the compensation signal and asserts a set signal. The second ramp circuit provides a trailing-edge ramp that begins ramping when the set signal is asserted. The second comparator compares the trailing-edge ramp with the compensation signal and asserts a reset signal. The pulse control logic asserts a PWM signal when the set signal is asserted and de-asserts the PWM signal when the reset signal is asserted. The controller may control multiple phases with current balancing. The slew rate of the ramps may be adjusted based on the number of PWM signal asserted.Type: ApplicationFiled: December 23, 2005Publication date: January 18, 2007Applicant: Intersil Americas Inc.Inventors: Weihong Qiu, Zhixiang Liang, Robert Isham, Ben Dowlat, Rami Abou-Hamze