Abstract: A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by a process in which source, drain and channel regions of the transistor are automatically defined and aligned by the fabrication process, without photolithographic patterning.

Abstract: A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by a process in which source, drain and channel regions of the transistor are automatically defined and aligned by the fabrication process, without photolithographic patterning.

Abstract: A single-pass heavy-ion fusion system includes a new arrangement of current multiplying processes that employs multiple isotopes to achieve the desired effect of distributing the task of amplifying the current among all the various processes, to relieve stress on any one process, and to increase margin of safety for assured ICF (inertial confinement fusion) power production. Energy and power of the ignition-driver pulses are greatly increased, thus increasing intensity of target heating and rendering reliable ignition readily attainable. The present design eliminates the need for storage rings. Further innovations are to give the HIF (heavy ion fusion) Driver flexibility to drive multiple chambers in the most general case of different total distances between the linac output and each of the various chambers. Using multiple chambers steeply decreases the pro-rata capital investment and operating costs per power production unit, in turn decreasing the cost of power to users.

Abstract: A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by a process in which source, drain and channel regions of the transistor are automatically defined and aligned by the fabrication process, without photolithographic patterning.

Abstract: A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by a process in which source, drain and channel regions of the transistor are automatically defined and aligned by the fabrication process, without photolithographic patterning.

Abstract: A contact structure and a method of forming thereof for semiconductor devices or assemblies are described. The method provides process steps to create a contact structure encompassed by a sacrificial contact medium having an opening therein that is lined with a conductive spacer liner that effectively prevents the contact structure from being damaged during removal of the surrounding sacrificial contact medium material. The sacrificial contact medium is then replaced with a non-boron doped dielectric material.

Abstract: A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by a process in which source, drain and channel regions of the transistor are automatically defined and aligned by the fabrication process, without photolithographic patterning.

Abstract: A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by a process in which source, drain and channel regions of the transistor are automatically defined and aligned by the fabrication process, without photolithographic patterning.

Abstract: A contact structure and a method of forming thereof for semiconductor devices or assemblies are described. The method provides process steps to create a contact structure encompassed by a sacrificial contact medium having an opening therein that is lined with a conductive spacer liner that effectively prevents the contact structure from being damaged during removal of the surrounding sacrificial contact medium material. The sacrificial contact medium is then replaced with a non-boron doped dielectric material.

Abstract: A vehicle utilize a cellular design to provide variously sized vehicles constructed from varying numbers of substantially identical cells. Each cell, fabricated from lightweight materials including composites, includes: compartment, floor section, sidewalls, roof, drive train, steering, brakes; and wheels coupled through axles and independent suspensions to the vehicle body, each suspension including a height adjuster, a flow-control shock absorber, and a rapid-response air spring for and exceptionally comfortable ride. The suspension system reduces structural requirements for the body. All-wheel steering lends the vehicle exceptionally high maneuverability. A hybrid power system combines an alternative fueled engine to power electricity generation and all-wheel electric drive with main energy storage in advanced battery technology. The cellular design and attendant weight reduction allow suspensions and drive trains to be substantially fabricated from light truck parts.

Abstract: A vehicle utilize a cellular design to provide variously sized vehicles constructed from varying numbers of substantially identical cells. Each cell, fabricated from lightweight materials including composites, includes: compartment, floor section, sidewalls, roof, drive train, steering, brakes; and wheels coupled through axles and independent suspensions to the vehicle body, each suspension including a height adjuster, a flow-control shock absorber, and a rapid-response air spring for and exceptionally comfortable ride. The suspension system reduces structural requirements for the body. All-wheel steering lends the vehicle exceptionally high maneuverability. A hybrid power system combines an alternative fueled engine to power electricity generation and all-wheel electric drive with main energy storage in advanced battery technology. The cellular design and attendant weight reduction allow suspensions and drive trains to be substantially fabricated from light truck parts.

Abstract: An apparatus and method is presented for a DRAM memory cell array exhibiting improved alignment tolerance for bit line contact formation and utilizing closely-spaced double-sided stacked capacitors for increased overall feature density on the circuit die. The use of a sacrificial insulating layer, an etch-stop insulating layer, and insulating spacers surrounding the bit line contact plug permits wet etching of the sacrificial layer to enable double-sided capacitors to be formed close together. In the resulting structure, only the bit line contact plug and insulating sidewall spacers separates adjacent capacitors and hence DRAM cells can be more tightly packed on the circuit die. Another aspect of the invention is improved alignment tolerance of the bit line contact plug.

Abstract: An apparatus and method is presented for a DRAM memory cell array exhibiting improved alignment tolerance for bit line contact formation and utilizing closely-spaced double-sided stacked capacitors for increased overall feature density on the circuit die. The use of a sacrificial insulating layer, an etch-stop insulating layer, and insulating spacers surrounding the bit line contact plug permits wet etching of the sacrificial layer to enable double-sided capacitors to be formed close together. In the resulting structure, only the bit line contact plug and insulating sidewall spacers separates adjacent capacitors and hence DRAM cells can be more tightly packed on the circuit die. Another aspect of the invention is improved alignment tolerance of the bit line contact plug.

Abstract: An apparatus and method is presented for a DRAM memory cell array exhibiting improved alignment tolerance for bit line contact formation and utilizing closely-spaced double-sided stacked capacitors for increased overall feature density on the circuit die. The use of a sacrificial insulating layer, an etch-stop insulating layer, and insulating spacers surrounding the bit line contact plug permits wet etching of the sacrificial layer to enable double-sided capacitors to be formed close together. In the resulting structure, only the bit line contact plug and insulating sidewall spacers separates adjacent capacitors and hence DRAM cells can be more tightly packed on the circuit die. Another aspect of the invention is improved alignment tolerance of the bit line contact plug.

Abstract: A multi-layer abstraction bucket mechanism connected between applications programs and at least one data source and providing to the users transformations of data and the results of processes performed on the data. The multi-layer abstraction bucket mechanism includes hierarchically connected abstraction layers, each including a methods object for storing methods for performing operations on data received from a data bucket of a hierarchically next lower abstraction layer, a data operation object for selecting a method to be executed by the method object, a data bucket for storing the results of an executed method, and a map for storing information for constructing the data bucket and for relating requests to methods residing in the methods object. The mechanism includes a data extraction layer and an abstraction layer. At least one abstraction layer is a data transformation layer while others include a data processing layer and a rules transformation layer for performing the rule based decision operations.

Abstract: A method and apparatus for providing access to database data by applications programs executing on a computer system wherein a database bucket mechanism is interposed between one or more application programs and one or more databases. The bucket mechanism is comprised of an applications interface communicating with each of the applications programs in their native modes and a bucket engine generating "buckets" containing "bucket objects". Each bucket represents a group or class of database data members and contains one or more bucket data objects containing members of the databases, a database object mapping the bucket data object to the databases and an access object containing methods for accessing the databases in their native modes. Buckets and bucket data objects are constructed by the bucket engine according to information stored in an object map and a table map.

Abstract: A nondestructive product level calibration method which is based on reflectance of intensity of UV and visible light that is measured from the top surface of a semiconductor wafer in a RTP closed loop process control environment in which the temperature of the wafer is regulated as a function of reflectivity of radiation at a preselected wavelength from the top surface of the wafer. In the method, sheet resistance of the wafer is measured as a function of the intensity of the UV and IR light directed at the wafer over a predetermined temperature and time range. Then, the reflectance intensity off wafer is measured to develop a model of the top surface. The reflectance model will indicate a wavelength where the reflectance is the greatest. Next, the wafer is subjected to UV radiation at the most sensitive wavelength and the reflectance is plotted against intensity of heat treatment.

Abstract: A mounting for applying lubrication to the flanges of locomotive truck wheels comprising bearing brackets attached to the journal boxes at either end of an axle and projecting upward therefrom, a hinge plate rotatably attached to the top of each bearing bracket, a floating arm rotatably attached at each of its ends to the top of the hinge plates, and a lubrication stick applicator with lubrication stick attached to each end of the floating arm with the lubrication stick in contact with the flange of each of the wheels on the axle.

Abstract: A device to provide high current, low emittance electron beams with a long life cathode. The device consists of an undulator 7 which provides a source of ultraviolet light 15 for an ultraviolet photocathode 8. The undulator 7 needs a supply of electrons to produce the ultraviolet light which it can get by diverting a portion of a beam from a linear accelerator 3 before E.sub.3 or after E.sub.4 the electron beam traverses a free electron laser 5. The device is self-maintaining once a source of electrons is developed but needs a start-up source of electrons. The start up source can be provided by a pulsed cathode electron gun 1 which has to be on for a short period of time until the ultraviolet photocathode 8 is operated.

Abstract: An approach is shown for eliminating the expense of a plurality of linear accelerators as used in a multiple electron beams free electron laser system. A single linear accelerator is used to simultaneously accelerate a plurality of electron beams by using an electron beam deflection means such as a bending magnet to cause multiple beams to converge to a single stream of electrons for acceleration by the linear accelerator and then using a similar beam deflection means to re-define the accelerated beams in accordance with their repsective enery levels into a similar plurality of output beams.