Patents by Inventor Robert J. Gabor

Robert J. Gabor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4321588
    Abstract: A breadboard assembly to facilitate connecting electrical circuits comprises a breadboard member including a housing, plural electrical contacts in the housing, openings, in at least one surface of the housing for permitting access for connection to respective contacts by a member inserted therein, and a tray for adjustably holding at least one member in operative position therein.
    Type: Grant
    Filed: March 20, 1980
    Date of Patent: March 23, 1982
    Assignee: A P Products Incorporated
    Inventors: Robert J. Gabor, John N. Tengler, Kenneth W. Braund
  • Patent number: 4029914
    Abstract: A multiple switch device is connectable on-line between a multiple conductor electrical cable termination assembly or the like and a receptacle or the like to which the assembly would otherwise be connected. The multiple switch device includes a plurality of slide switches that are selectively actuable to open or to close respective circuits between such assembly and such receptacle.
    Type: Grant
    Filed: April 14, 1976
    Date of Patent: June 14, 1977
    Assignee: A P Products Incorporated
    Inventors: Gary M. Schmidt, Robert J. Gabor, John T. Venaleck
  • Patent number: 4011508
    Abstract: A probe for testing logic signals or the like occurring in electric circuits and for indicating whether such signals are at low, intermediate or high level or that an open circuit exists in the tested circuit includes first and second parallel connected display portions, the former having a first liquid crystal indicator in series with a battery the latter including a second liquid crystal. The first liquid crystal is normally energized when the difference between the battery voltage and the received signal being tested exceeds the threshold level thereof, and the second liquid crystal is normally energized when the voltage of the received signal being tested exceeds the threshold level thereof, such energization indicating whether the tested signal is at high or low level. De-energization of both liquid crystals indicates that the tested signal is at an intermediate level, also known as the deadband region between low and high level signals, or that an open circuit exists in the tested circuit.
    Type: Grant
    Filed: March 24, 1975
    Date of Patent: March 8, 1977
    Assignee: A & P Products Incorporated
    Inventor: Robert J. Gabor
  • Patent number: 3999126
    Abstract: A test clip suitable for connection to a plurality of terminals at which appear respective logic signals representing those occurring in logic circuits provides an indication of the logic level of such signals. The circuit for effecting such indication is entirely self-contained requiring no external power source or grounding connection and includes a plurality of respective input lines connectable to such terminals with a respective indicator shunted by a reverse poled diode connected to each input line and one common connection for all the diodes and indicators. Thus, for example, a logic 1 signal occurring on one of the input lines will effect a current flow through a respective indicator to change the state thereof with a return current flow path being provided from the common connection through at least one of the shunting diodes connected to another input line then at logic 0 relatively ground potential.
    Type: Grant
    Filed: April 17, 1975
    Date of Patent: December 21, 1976
    Assignee: A & P Products Incorporated
    Inventor: Robert J. Gabor