Patents by Inventor Robert J. Wojnarowski
Robert J. Wojnarowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6890234Abstract: A light source (10) includes a light emitting component (32), such as a UV/blue light emitting diode or laser diode coated with a layer (60) of a phosphor material (64). The phosphor material converts a portion of the light emitted by the light emitting component to light of a longer wavelength, such as yellow light. The thickness d of the layer varies across the light emitting component in relation to the intensity of light emitted by the light emitting component. This maintains a uniform color of the emission from the light source while minimizing the loss in light intensity (brightness) due to the presence of the phosphor.Type: GrantFiled: May 3, 2004Date of Patent: May 10, 2005Assignee: General Electric CompanyInventors: Jacob C. Bortscheller, Robert J. Wojnarowski
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Patent number: 6883926Abstract: An apparatus for visual illumination comprised of a display surface, including a phosphor material. At least one light emitting semi-conductor device is (LED) positioned to radiate the phosphor material. The LED emits electromagnetic radiation in a range which excites the phosphor material.Type: GrantFiled: July 29, 2002Date of Patent: April 26, 2005Assignee: General Electric CompanyInventor: Robert J. Wojnarowski
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Publication number: 20040203312Abstract: A light source (10) includes a light emitting component (32), such as a UV/blue light emitting diode or laser diode coated with a layer (60) of a phosphor material (64). The phosphor material converts a portion of the light emitted by the light emitting component to light of a longer wavelength, such as yellow light. The thickness d of the layer varies across the light emitting component in relation to the intensity of light emitted by the light emitting component. This maintains a uniform color of the emission from the light source while minimizing the loss in light intensity (brightness) due to the presence of the phosphor.Type: ApplicationFiled: May 3, 2004Publication date: October 14, 2004Inventors: Jacob C. Bortscheller, Robert J. Wojnarowski
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Patent number: 6747406Abstract: A light source (10) includes a light emitting component (32), such as a UV/blue light emitting diode or laser diode coated with a layer (60) of a phosphor material (64). The phosphor material converts a portion of the light emitted by the light emitting component to light of a longer wavelength, such as yellow light. The thickness d of the layer varies across the light emitting component in relation to the intensity of light emitted by the light emitting component. This maintains a uniform color of the emission from the light source while minimizing the loss in light intensity (brightness) due to the presence of the phosphor.Type: GrantFiled: August 7, 2000Date of Patent: June 8, 2004Assignee: General Electric CompanyInventors: Jacob C. Bortscheller, Robert J. Wojnarowski
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Patent number: 6635987Abstract: Phosphor application for high power LED lamps for use in lighting products includes a lensing structure and a phosphor layer applied to at least one side of the lensing structure. The lensing structure is positioned in the LED lamp so that emitted light from the LED die excites the phosphor layer. The lensing structure ensures both uniform color and light output as it eliminates the necessity of applying the phosphor layer directly to the LED die surface.Type: GrantFiled: September 26, 2000Date of Patent: October 21, 2003Assignee: General Electric CompanyInventors: Robert J. Wojnarowski, Thomas J. Pozda
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Patent number: 6635363Abstract: A light source (10) includes a light emitting component (32), such as a UV/blue light emitting diode or laser diode. A layer (62, 162, 262, 362) of a phosphor material is spaced from the light emitting component by a layer (60, 160, 260, 360) of a material which is transmissive to the light emitted by the light emitting component. The phosphor material converts a portion of the light emitted by the light emitting component to light of a longer wavelength such as yellow light. In a preferred embodiment, the light transmissive layer valise in thickness over the light emitting component so that the phosphor is spaced further from the diode in regions where the emission is higher. This increases the Surface area of the phosphor in these regions and minimizes the effects of overheating and saturation on the phosphor emission.Type: GrantFiled: August 21, 2000Date of Patent: October 21, 2003Assignee: General Electric CompanyInventors: Steven Jude Duclos, Jon Jansma, Jacob C. Bortscheller, Robert J. Wojnarowski
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Patent number: 6604971Abstract: A method of manufacturing an LED lamp includes dispersing color correction particles throughout a suspension media to a viscosity of substantially 2000 cP. In the case of correcting blue GaN LEDs to white light, the particles to be blended are phosphorus having a diameter of less than 20 microns. An LED die is mounted onto a stage and a nano-liter pipette is arranged such that an interface separation of approximately 1 millimeter is achieved between the tip of the pipette and the surface of the LED die. Once the relatively viscous suspension media covers the LED die, ultraviolet light is directed towards the suspension media to cure it. Heat is then applied to further cure the suspension media until solid as observed under a microscope.Type: GrantFiled: May 2, 2000Date of Patent: August 12, 2003Assignee: General Electric CompanyInventors: Xiao-Dong Sun, Robert J. Wojnarowski, Raul E. Ayala, Thomas F. McNulty
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Publication number: 20020186556Abstract: An apparatus for visual illumination comprised of a display surface, including a phosphor material. At least one light emitting semi-conductor device is (LED) positioned to radiate the phosphor material. The LED emits electromagnetic radiation in a range which excites the phosphor material.Type: ApplicationFiled: July 29, 2002Publication date: December 12, 2002Applicant: GENERAL ELECTRIC COMPANYInventor: Robert J. Wojnarowski
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Patent number: 6483196Abstract: A flip chip structure of a light-emitting device comprising a UV/blue light emitting diode (LED) is disclosed. The flip chip structure is optimized to produce unique light focusing and phosphor illumination out the bottom of the structure. The flip chip structure includes a substrate, a gallium nitride layer epitaxially grown on a top surface of the substrate, and one or more layers of lensing material deposited on a bottom surface of the substrate. The lensing material is preferably a polymer lensing material, an index matching material, or a mixture thereof. The gallium nitride layer is deposited in the form of one or more odd-sided polygons, for enhanced light extraction.Type: GrantFiled: April 3, 2000Date of Patent: November 19, 2002Assignee: General Electric CompanyInventors: Robert J. Wojnarowski, William P. Minnear, Pamela K. Benicewicz
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Patent number: 6452217Abstract: High power LED lamps for use in lighting products, such as flashlights and the like, are formed of a plurality of LED die arranged in a multi-dimensional array, each of the LED die having a gallium nitride semiconductor layer and phosphor material for creation of white light. Each of the LED die emits light from the top, bottom and sides of the die and is arranged on the multi-dimensional array so that the emitted light from each of the die does not contact another die. A reflector gathers and focuses the light from each of the die to approximate a high power LED lamp. A thermally conducting, electrically insulating material or phase change material is incorporated into the lamp to act as a source of heat removal.Type: GrantFiled: June 30, 2000Date of Patent: September 17, 2002Assignee: General Electric CompanyInventors: Robert J. Wojnarowski, William P. Minnear
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Patent number: 6407411Abstract: An improved LED lead frame packaging assembly includes a thermally conducting, electrically insulating material that enhances the thermal conduction and structural integrity of the assembly, a UV-resistant encapsulantmaterial, and an integral ESD material that reduces electrostatic discharge. The thermally conducting, electrically insulating material creates an electrically insulating, thermally conductive path in the lead frame assembly for dissipation of power and also acts as a mounting structure thus allowing for the use of a soft encapsulant material, preferably a silicone.Type: GrantFiled: April 13, 2000Date of Patent: June 18, 2002Assignee: General Electric CompanyInventors: Robert J. Wojnarowski, Richard J. Uriarte, Ferenc Horkay, Pamela K. Benicewicz, William P. Minnear
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Patent number: 5576517Abstract: An electronic structure includes a circuit chip having chip pads and supported by a substrate, and a low dielectric constant porous polymer layer having pores and situated over the substrate and circuit chip. The porous polymer layer has at least one via therein aligned with at least one of the chip pads, and a pattern of electrical conductors extends over a portion of the porous polymer layer and into the at least one via. The pattern of electrical conductors does not significantly protrude into the pores of the porous polymer layer.Type: GrantFiled: March 27, 1995Date of Patent: November 19, 1996Assignee: General Electric CompanyInventors: Robert J. Wojnarowski, Herbert S. Cole, Theresa A. Sitnik-Nieters, Wolfgang Daum
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Patent number: 5567657Abstract: First and second flexible interconnect structures are provided and each includes a flexible interconnect layer and a chip with a surface having chip pads attached to the flexible interconnect layer. Molding material is inserted between the flexible interconnect layers for encapsulating the respective chips. Vias in the flexible interconnect layers are formed to extend to selected chip pads, and a pattern of electrical conductors is applied which extends over the flexible interconnect layers and into the vias to couple selected ones of the chip pads.Type: GrantFiled: December 4, 1995Date of Patent: October 22, 1996Assignee: General Electric CompanyInventors: Robert J. Wojnarowski, Thomas B. Gorczyca
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Patent number: 5562838Abstract: HDI fabrication techniques are employed to form a variety of optical waveguide structures in polymer materials. Adaptive optical connections are formed, taking into account the actual position and orientation of devices which may deviate from the ideal. Structures include solid light-conducting structures, hollow light-conducting structures which are also suitable for conducting cooling fluid, and optical switching devices employing liquid crystal material. A "shrink back" method may be used to form a tunnel in polymer material which is then filled with an uncured polymer material that shrinks upon curing.Type: GrantFiled: March 29, 1993Date of Patent: October 8, 1996Assignee: Martin Marietta CorporationInventors: Robert J. Wojnarowski, Herbert S. Cole, John L. Henkes
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Patent number: 5554305Abstract: A method for processing a low dielectric constant material includes dispersing an additive material in a porous low dielectric constant layer, fabricating a desired electronic structure, and then removing the additive material from the pores of the low dielectric constant layer. The removal of the additive material from the pores can be accomplished by sublimation, evaporation, and diffusion. Applications for the low dielectric constant layer include the use as an overlay layer for interconnecting a circuit chip supported by a substrate and the use as printed circuit board material.Type: GrantFiled: March 27, 1995Date of Patent: September 10, 1996Assignee: General Electric CompanyInventors: Robert J. Wojnarowski, Herbert S. Cole, Theresa A. Sitnik-Nieters, Wolfgang Daum
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Patent number: 5546654Abstract: A method for fabricating an electronic assembly comprises attaching an insulative film to a frame and positioning at least one electronic component having a face with connections pads face down on the insulative film. The insulative film is positioned on a porous sheet supported by a vacuum fixture. The porous sheet and vacuum fixture are adapted so as to be capable of creating vacuum conditions for holding the insulative film with a substantially flat surface on the porous sheet. A vacuum is created within the vacuum chamber for flatly holding the insulative film on the porous sheet. A substrate is applied to the insulative film and the at least one electronic component. In one embodiment the substrate is applied by securing the insulative film in position with a mold form having at least one opening around the electronic component and adding substrate molding material at least partially around the component through the opening.Type: GrantFiled: August 29, 1994Date of Patent: August 20, 1996Assignee: General Electric CompanyInventors: Robert J. Wojnarowski, Thomas B. Gorczyca
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Patent number: 5527741Abstract: A method for fabricating a circuit module includes applying an outer insulative layer over a first patterned metallization layer on a first surface of a base insulative layer. A second surface of the base insulative layer has a second patterned metallization layer. At least one circuit chip having chip pads is attached to the second surface of the base insulative layer. Respective vias are formed to expose selected portions of the first patterned metallization layer, the second patterned metallization layer, and the chip pads. A patterned outer metallization layer is applied over the outer insulative layer to extend through selected ones of the vias to interconnect selected ones of the chip pads and selected portions of the first and second metallization layers.Type: GrantFiled: October 11, 1994Date of Patent: June 18, 1996Assignee: Martin Marietta CorporationInventors: Herbert S. Cole, Raymond A. Fillion, Bernard Gorowitz, Ronald F. Kolc, Robert J. Wojnarowski
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Patent number: 5525190Abstract: HDI fabrication techniques are employed to form a variety of optical waveguide structures in polymer materials. Adaptive optical connections are formed, taking into account the actual position and orientation of devices which may deviate from the ideal. Structures include solid light-conducting structures, hollow light-conducting structures which are also suitable for conducting cooling fluid, and optical switching devices employing liquid crystal material. A "shrink back" method may be used to form a tunnel in polymer material which is then filled with an uncured polymer material that shrinks upon curing.Type: GrantFiled: March 22, 1995Date of Patent: June 11, 1996Assignee: Martin Marietta CorporationInventors: Robert J. Wojnarowski, Herbert S. Cole, John L. Henkes
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Patent number: 5452182Abstract: A flexible high density interconnect structure is provided by extending the high density interconnect structure beyond the solid substrate containing the chips interconnected thereby. During fabrication, the flexible portion of the high density interconnect structure is supported by a temporary interconnect support to facilitate fabrication of the structure in accordance with existing fabrication techniques. Subsequently, that temporary support structure may be removed or may remain in place if it sufficiently flexible to impart the desired degree of flexibility to that portion of the high density interconnect structure. Methods of fabrication are also disclosed.Type: GrantFiled: April 7, 1992Date of Patent: September 19, 1995Assignee: Martin Marietta CorporationInventors: Charles W. Eichelberger, William P. Kornrumpf, Robert J. Wojnarowski
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Patent number: 5449427Abstract: A method for processing a low dielectric constant material includes dispersing an additive material in a porous low dielectric constant layer, fabricating a desired electronic structure, and then removing the additive material from the pores of the low dielectric constant layer. The removal of the additive material from the pores can be accomplished by sublimation, evaporation, and diffusion. Applications for the low dielectric constant layer include the use as an overlay layer for interconnecting a circuit chip supported by a substrate and the use as printed circuit board material.Type: GrantFiled: May 23, 1994Date of Patent: September 12, 1995Assignee: General Electric CompanyInventors: Robert J. Wojnarowski, Herbert S. Cole, Theresa A. Sitnik-Nieters, Wolfgang Daum