Abstract: A process is described to allow an early power estimate where switching activity provided by a simulation of a logical hierarchy in a chip design is accomplished by mapping ports in the physical hierarchy to ports in a logical hierarchy after hierarchy manipulation has been done. Power estimation is done using the switching activity from the simulation of the logical hierarchy mapped to the ports of the physical hierarchy. Early power estimation using results of the hierarchy manipulation is better than power estimation on the logical hierarchy because blocks and signals in the logical hierarchy may be replicated or merged during the hierarchy manipulation.

Abstract: A processor receives an expression of design refinement intent with regard to an entity forming a part of a modular circuit design. The entity is defined by a hardware description language (HDL) file, and the expression of design refinement intent identifies an intent region within an implementation of the entity and specifies replacement logic for the region. Based on the expression of design refinement intent, the processor automatically modifies the HDL file by replacing logic within the intent region with the replacement logic. The processor then performs logical synthesis to generate a gate list representation of the modular circuit design as modified.

Abstract: Based on a directive in a control file, a processor pre-routes, within a hierarchical integrated circuit design, a signal through one or more levels of design hierarchy between a signal source at a higher level of the design hierarchy and an entity instance at a lower level of the design hierarchy. The processor processes entity instances in the design hierarchy in a bottom-up manner to insert technology-specific structures into the hierarchical integrated circuit design. During the processing, the processor inserts into a particular entity instance of the design hierarchy a technology-specific structure and connects the technology-specific structure to the signal pre-routed to the particular entity instance by the pre-routing.