Patents by Inventor Robert Jeffrey Bailey

Robert Jeffrey Bailey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190377025
    Abstract: Techniques and systems are described that enable multiplexed DLTS and HSCV measurements.
    Type: Application
    Filed: June 8, 2018
    Publication date: December 12, 2019
    Inventor: Robert Jeffrey Bailey
  • Publication number: 20190134651
    Abstract: A method includes providing a molten stream of a metal material to an atomizer, atomizing the molten stream using at least one jet of a vapor stream comprising a selenium vapor to form atomized droplets, and solidifying the atomized droplets to form selenized metal particles.
    Type: Application
    Filed: November 8, 2017
    Publication date: May 9, 2019
    Inventors: Robert Jeffrey BAILEY, Geordie ZAPALAC
  • Publication number: 20120234242
    Abstract: The present invention provides methods and systems of reacting a precursor material disposed on a continuous flexible workpiece to form a solar cell absorber. The reactor is configured to have a uniform transition in cross-sectional area from a gas inlet into a reaction space and then a uniform transition in cross-sectional area from the reaction area to a gas outlet. The uniform transition reduces gas turbulence. The continuous flexible workpiece may also be positioned on a floor that is configured to reduce turbulence adjacent the lateral edges of the continuous flexible workpiece.
    Type: Application
    Filed: May 3, 2011
    Publication date: September 20, 2012
    Applicant: SoloPower, Inc.
    Inventor: Robert Jeffrey Bailey
  • Publication number: 20110268891
    Abstract: A gas delivery device is for use in low pressure Atomic Layer Deposition at a substrate location. The device includes a first generally elongate injector for supplying process gas to a process zone, a first exhaust zone circumjacent the process zone, and a further injector circumjacent the first exhaust gas for supplying purge or inert gas at an outlet surrounding the process zone having a wall for facing the location circumjacent the outlet to define at least a partial gas seal.
    Type: Application
    Filed: July 13, 2009
    Publication date: November 3, 2011
    Applicant: SPP PROCESS TECHNOLOGY SYSTEMS UK LIMITED
    Inventors: John MacNeil, Robert Jeffrey Bailey
  • Publication number: 20100117203
    Abstract: A process for forming an oxide-containing film from silicon is provided that includes heating the silicon substrates to a process temperature of between 250° C. and 1100° C. with admission into the process chamber of diatomic reductant source gas Z-Z? where Z and Z? are each H, D and T and a stable source of oxide ion. Multiple exhaust ports exist along the vertical extent of the process chamber to create reactant across flow. A batch of silicon substrates is provided having multiple silicon base layers, each of the silicon base layers having exposed <110> and <100> planes and a film residual stress associated with the film being formed at a temperature of less than 600° C. and having a <110> film thickness that exceeds a <100> film thickness on the <100> crystallographic plane by less than 20%, or a film characterized by thickness anisotropy less than 18% and an electrical breakdown field of greater than 10.5 MV/cm.
    Type: Application
    Filed: January 30, 2007
    Publication date: May 13, 2010
    Applicant: Aviza Technology, Inc.
    Inventors: Robert Jeffrey Bailey, Hood Chatham, Derrick Foster, Olivier Laparra, Martin Mogaard, Cole Porter, Taiquing T. Qiu, Helmuth Treichel
  • Publication number: 20080038486
    Abstract: A process for radical assisted film deposition simultaneously on multiple wafer substrates is provided. The multiple wafer substrates are loaded into a reactor that is heated to a desired film deposition temperature. A stable species source of oxide or nitride counter ion is introduced into the reactor. An in situ radical generating reactant is also introduced into the reactor along with a cationic ion deposition source. The cationic ion deposition source is introduced for a time sufficient to deposit a cationic ion-oxide or a cationic ion-nitride film simultaneously on multiple wafer substrates. Deposition temperature is below a conventional chemical vapor deposition temperature absent the in situ radical generating reactant.
    Type: Application
    Filed: August 2, 2007
    Publication date: February 14, 2008
    Inventors: Helmuth Treichel, Taiqing Qiu, Robert Jeffrey Bailey
  • Publication number: 20080000424
    Abstract: A showerhead for a gas supply apparatus. This showerhead includes a body having a distribution plate on one side and at least one gas chamber contained within the body. A plurality of holes extend normally from an outer surface of the distribution plate to the chamber. Furthermore, at least a portion of at least one hole is frustoconical or frustopyramidal in shape along the normal axis with the base of the frustoconical or frustopyramidal hole positioned adjacent the outer surface of the distribution plate.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 3, 2008
    Applicant: Aviza Technology, Inc.
    Inventors: Robert Jeffrey Bailey, Jay Brian DeDontney
  • Publication number: 20030121898
    Abstract: A wafer support apparatus is provided which comprises a support puck and one or more heaters coupled to the support puck for providing uniform temperature distribution across the surface of the support puck and the wafer surface. The one or more heaters are independently controllable. The wafer support apparatus may further comprise an insulation ring disposed between the support puck and a cooler housing to decouple the support puck from the housing.
    Type: Application
    Filed: November 22, 2002
    Publication date: July 3, 2003
    Inventors: Tom Kane, Robert Jeffrey Bailey, Sam Kurita, Kris Veeck
  • Publication number: 20020066412
    Abstract: A wafer carrier is provided comprised of a circular plate having a flat edge region extending around the circumference of the plate. The plate has a circular recessed center region with a recessed bottom surface and includes an upwardly inclined surface around the periphery of the recessed bottom surface. A substrate is placed in the center region where it is supported by a portion of the upwardly inclined surface and is spaced apart form the recessed bottom surface such that the substrate is supported only around its edge. The wafer carrier minimizes surface contact with the substrate thereby minimizing metal contamination and surface damage to the backside of a substrate and prevents deposition on the backside of the substrate.
    Type: Application
    Filed: December 8, 1999
    Publication date: June 6, 2002
    Inventors: JACK CHIHCHIEH YAO, ROBERT JEFFREY BAILEY
  • Patent number: 6026589
    Abstract: A wafer carrier is provided comprised of a circular plate having a flat edge region extending around the circumference of the plate. The plate has a circular recessed center region with a recessed bottom surface and includes an upwardly inclined surface around the periphery of the recessed bottom surface. A substrate is placed in the center region where it is supported by a portion of the upwardly inclined surface and is spaced apart form the recessed bottom surface such that the substrate is supported only around its edge. The wafer carrier minimizes surface contact with the substrate thereby minimizing metal contamination and surface damage to the backside of a substrate and prevents deposition on the backside of the substrate.
    Type: Grant
    Filed: February 2, 1998
    Date of Patent: February 22, 2000
    Assignee: Silicon Valley Group, Thermal Systems LLC
    Inventors: Jack Chihchieh Yao, Robert Jeffrey Bailey
  • Patent number: 5916378
    Abstract: A method of reducing metal contamination during semiconductor processing in a reactor having metal components is provided. The method includes forming an aluminum oxide layer on the surface of certain of the metal components before processing of substrates. The aluminum oxide layer substantially prevents the formation of volatile metal atoms from the metal components. The aluminum oxide layer is formed by heating the metal component first in a dry N.sub.2 atmosphere to a first temperature, and then in a dry H.sub.2 atmosphere to a second temperature. The component is then soaked at the second temperature in a wet H.sub.2 atmosphere to form the aluminum oxide layer, and is followed by soaking at the second temperature in a dry H.sub.2 atmosphere to reduce any other metal oxides that may have formed. The component is then cooled first in a dry H.sub.2 atmosphere, and then in a dry N.sub.2 atmosphere where a layer of substantially pure aluminum oxide is provided on the surface of the metal component.
    Type: Grant
    Filed: March 11, 1997
    Date of Patent: June 29, 1999
    Assignee: WJ Semiconductor Equipment Group, Inc.
    Inventors: Robert Jeffrey Bailey, Patrick J. Brady