Patents by Inventor Robert K. P. Galpin

Robert K. P. Galpin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5392327
    Abstract: There is a demand for user access to ISDN services at the two-wire interface point. The frequently raised objection to such access is the problem of determining the location of a fault and hence the responsibility for the fault. This is solved by the use of a voltage sensor responsive to a DC voltage less than a normal line feed voltage within a voltage range not used in normal operation to control a switch operative to disconnect a subscriber termination unit from the line, and to provide a known linear terminating impedance for the line for the duration of the application of the DC voltage.
    Type: Grant
    Filed: December 21, 1992
    Date of Patent: February 21, 1995
    Assignee: GPT Limited
    Inventor: Robert K. P. Galpin
  • Patent number: 5345496
    Abstract: Circuitry is provided for testing telephone lines, the circuitry comprising a loop current ring trip detector and a relay which in operation is used to break normal current to provide an end of call indication, and wherein said relay is also operative in one test mode to switch from said loop current ring detector to a comparator which functions as a test mode detector. The means may also include a second relay which when the circuit is in a second test mode is operated simultaneously with the first relay, the second relay being connected to a bell capacitor the discharge rate of which can be measured by said capacitor, and the comparator output is sequentially monitored to provide information as to the condition of the insulation and regarding bell capacitor and terminal connection.
    Type: Grant
    Filed: October 19, 1993
    Date of Patent: September 6, 1994
    Assignee: GPT Limited
    Inventor: Robert K. P. Galpin
  • Patent number: 4893309
    Abstract: A digital interface between at least two subscriber line interface circuits and a processing unit is described. The interface is configured in the form of a parallel interface. The level of an input/output register and of a control register is allocated, as needed, to the connections of the processing unit. These connections can be operated selectively as inputs or outputs. They can also be operated in two modes, depending upon which type of subscriber line interface circuit (SLIC) is connected. The connections of the last-mentioned units are partially operable as inputs or outputs and partially operable only as inputs but in the input case, selectively for various types of input signals.
    Type: Grant
    Filed: January 25, 1988
    Date of Patent: January 9, 1990
    Assignee: Siemens AG
    Inventors: Robert Lechner, Hans-Werner Rudolf, Harald Stader, Norbert Wingerath, Christopher C. A. Priest, Nigel P. Dyer, Robert K. P. Galpin, Marcello Manca, Virgilio Mosca, Antonio Nicastro, Pierre Albouy, Robert Le Gougnec, Ramatchandirane Nadaradjane
  • Patent number: 4890298
    Abstract: The Troposcatter Modem Receiver includes a combiner, demodulator, baseband filter, a complex coefficient forward equalizer, a detector and a feedback circuit. The combiner is a linear maximal-ratio combiner and receives a plurality of input signals at an intermediate frequency and generates a combined output signal for presentation to the demodulator. The demodulator produces a demodulated signal which is filtered by the baseband filter prior to being presented to a first input of the equalizer. The output of the equalizer is forwarded to the detector which produces an output signal. The signal is fed back by way of the feedback circuit to a second input of the equalizer to modify the output signal.
    Type: Grant
    Filed: December 8, 1987
    Date of Patent: December 26, 1989
    Assignee: Plessey Overseas Limited
    Inventor: Robert K. P. Galpin
  • Patent number: 4881226
    Abstract: A digital interface of an integrated subscriber line interface circuit is provided. The interface serves for the connection of a signal processor unit. Individual connections are used as signal inputs in signal entry operation of the interface, and as signal outputs in signal transmission operation. Other connections are used as signal inputs in both operating mode, but receive different signals in each operating mode. One group of connections includes two registers with respective associated decoders to enable switching from one to the other, so that the number of operating instructions that can be represented by means of binary signal value combinations applied to the connections is doubled.
    Type: Grant
    Filed: January 25, 1988
    Date of Patent: November 14, 1989
    Assignee: Siemens Aktiengesellschaft
    Inventors: Robert Lechner, Hans-Werner Rudolf, Harald Stader, Norbert Wingerath, Christopher C. A. Priest, Nigel P. Dyer, Robert K. P. Galpin, Pierre Albouy, Robert Le Gougnec, Ramatchandirane Nadaradjane, Marcello Manca, Virgilio Mosca, Antonio Nicastro
  • Patent number: 4360787
    Abstract: In high speed high quality modems it is important to be able to preserve the gain value for the automatic gain control system during breaks in transmission to permit rapid resumption of normal operation. The a.g.c. circuit comprises a basic a.g.c. transistor amplifier whose emitter-collector conductance is varied by a control voltage derived from the envelope of the amplifier output voltage which is well known. The invention involves the use of a digital-to-analog converter which is controlled by a digital-updown counter. The counter is controlled by a window comparator which compares the rectified output voltage of the amplifier with a reference voltage level and upper and lower limits. If the output voltage exceeds either limit, the counter is enabled and the appropriate up or down indication is given. The counter is then clocked to change the drive to the d-to-a converter which thereby changes the conductance of the a.g.c. transistor. The state of the up down counter will be used to maintain the a.g.c.
    Type: Grant
    Filed: September 12, 1980
    Date of Patent: November 23, 1982
    Assignee: Plessey Overseas Limited
    Inventor: Robert K. P. Galpin