Patents by Inventor Robert L. Miner

Robert L. Miner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4633128
    Abstract: A short arc type lamp having a concave reflecting wall including a convex space formed behind the concave wall such that the reflecting wall is relatively thin near the focal point of the lamp and relatively thicker radially outward. A copper sleeve member is attached to the reflecting wall within the convex space to conduct heat from the reflecting wall to the exterior wall of the lamp.
    Type: Grant
    Filed: May 17, 1985
    Date of Patent: December 30, 1986
    Assignee: ILC Technology, Inc.
    Inventors: Roy D. Roberts, Robert L. Miner
  • Patent number: 4502118
    Abstract: This disclosure relates to a network of reduction processors for the evaluation of one or more functions which are stored in memory in the form of a series of nodes of a treelike graph where the nodes implement a variable-free applicative language. The respective function operators are reduced through a progressive series of transformations or substitutions until a result is obtained. During the reduction process, the processor transfers nodes to and from memory and performs various operations as required on those nodes. The processor can also create new nodes in memory and delete unused ones.
    Type: Grant
    Filed: September 7, 1983
    Date of Patent: February 26, 1985
    Assignee: Burroughs Corporation
    Inventors: Carl F. Hagenmaier, Jr., Gary L. Logsdon, Brent C. Bolton, Robert L. Miner, Jr.
  • Patent number: 4447875
    Abstract: This disclosure relates to a reduction processor for the evaluation of one or more functions which are stored in memory in the form of a series of nodes of a treelike graph where the nodes implement a variable-free applicative language. The respective function operators are reduced through a progressive series of transformations or substitutions until a result is obtained. During the reduction process, the processor transfers nodes to and from memory and performs various operations as required on those nodes. The processor can also create new nodes in memory and delete unused ones.
    Type: Grant
    Filed: July 7, 1981
    Date of Patent: May 8, 1984
    Assignee: Burroughs Corporation
    Inventors: Brent C. Bolton, Carl F. Hagenmaier, Jr., Gary L. Logsdon, Robert L. Miner, Jr.