Abstract: Double diffused power MOSFET's and methods of manufacture. The source, base and drain regions of a double diffused power MOSFET correspond respectively to the emitter, base and collector of a parasitic bipolar transistor. Double diffused power MOSFET's perform better when provided with an ohmic short between the source and base regions to prevent turn-on of the parasitic bipolar transistor. In one form of ohmic short between the base and source regions, the source terminal comprises a metallic electrode, preferably aluminum, deposited over the source region, and the ohmic short comprises at least one microalloy spike extending from the source terminal metallic electrode through the source region and partly into the base region. Such microalloy spikes are formed by heating the semiconductor substrate after the metallic electrode has been deposited under appropriate conditions. In another form, a V-groove is formed by preferential etching in the source and base regions.

Abstract: A vertical channel junction gate electric field controlled device (e.g., a field effect transistor or a field controlled thyristor) includes a semiconductor base region layer, and a plurality of grooves having vertical walls formed in the upper surface of the base region layer. Between the grooves on the upper surface of the base region layer but not extending to the grooves are upper electrode regions, for example, source electrode regions or cathode electrode regions. Formed in the groove bottoms and sidewalls are junction gate regions. Upper electrode terminal metallization is evaporated generally on the upper device layer, and gate terminal metallization is over the junction gate regions at the bottoms of the grooves. The disclosed structure thus has continuous metallization along the recessed gate regions for a low-resistance gate connection.

Abstract: An improved semiconductor device having a diffused region of reduced length and an improved method of fabricating such a semiconductor device are disclosed. The semiconductor device may be a MOSFET or an IGR, by way of example. In a form of the method of fabricating a MOSFET, an N.sup.+ SOURCE is diffused into a P BASE through a window of a diffusion mask. An anisotropic or directional etchant is applied to the N.sup.+ SOURCE through the same window. The etchant removes most of the N.sup.+ SOURCE, but allows shoulders thereof to remain intact. These shoulders, which form the completed N.sup.+ SOURCE regions, are of reduced length, greatly reducing the risk of turn-on of a parasitic bipolar transistor in the MOSFET. The risk of turn-on of a parasitic bipolar transistor in an IGR is similarly reduced, when the IGR is fabricated by the improved method.

Abstract: Double diffused power MOSFET's and methods of manufacture. The source, base and drain regions of a double diffused power MOSFET correspond respectively to the emitter, base and collector of a parasitic bipolar transistor. Double diffused power MOSFET's perform better when provided with an ohmic short between the source and base regions to prevent turn-on of the parasitic bipolar transistor. In one form of ohmic short between the base and source regions, the source terminal comprises a metallic electrode, preferably aluminum, deposited over the source region, and the ohmic short comprises at least one microalloy spike extending from the source terminal metallic electrode through the source region and partly into the base region. Such microalloy spikes are formed by heating the semiconductor substrate after the metallic electrode has been deposited under appropriate conditions. In another form, a V-groove is formed by preferential etching in the source and base regions.