Abstract: A method of fabricating a thermoelectric device includes providing a substrate having a plurality of inclined growth surfaces protruding from a surface thereof. Respective thermoelectric material layers are grown on the inclined growth surfaces, and the respective thermoelectric material layers coalesce to collectively define a continuous thermoelectric film. A surface of the thermoelectric film opposite the surface of the substrate may be substantially planar, and a crystallographic orientation of the thermoelectric film may be tilted at an angle of about 45 degrees or less relative to a direction along a thickness thereof. Related devices and fabrication methods are also discussed.

Abstract: Large area single crystal III-V nitride material having an area of at least 2 cm2, having a uniformly low dislocation density not exceeding 3×106 dislocations per cm2 of growth surface area, and including a plurality of distinct regions having elevated impurity concentration, wherein each distinct region has at least one dimension greater than 50 microns, is disclosed. Such material can be formed on a substrate by a process including (i) a first phase of growing the III-V nitride material on the substrate under pitted growth conditions, e.g., forming pits over at least 50% of the growth surface of the III-V nitride material, wherein the pit density on the growth surface is at least 102 pits/cm2 of the growth surface, and (ii) a second phase of growing the III-V nitride material under pit-filling conditions.

Abstract: A method of fabricating a thermoelectric device includes providing a substrate having a plurality of inclined growth surfaces protruding from a surface thereof. Respective thermoelectric material layers are grown on the inclined growth surfaces, and the respective thermoelectric material layers coalesce to collectively define a continuous thermoelectric film. A surface of the thermoelectric film opposite the surface of the substrate may be substantially planar, and a crystallographic orientation of the thermoelectric film may be tilted at an angle of about 45 degrees or less relative to a direction along a thickness thereof. Related devices and fabrication methods are also discussed.

Abstract: The present invention relates to various switching device structures including Schottky diode, P-N diode, and P-I-N diode, which are characterized by low defect density, low crack density, low pit density and sufficient thickness (>2.5 um) GaN layers of low dopant concentration (<1E16 cm?3) grown on a conductive GaN layer. The devices enable substantially higher breakdown voltage on hetero-epitaxial substrates (<2 KV) and extremely high breakdown voltage on homo-epitaxial substrates (>2 KV).

Abstract: The present invention relates to various switching device structures including Schottky diode, P-N diode, and P-I-N diode, which are characterized by low defect density, low crack density, low pit density and sufficient thickness (>2.5 um) GaN layers of low dopant concentration (<1E16 cm?3) grown on a conductive GaN layer. The devices enable substantially higher breakdown voltage on hetero-epitaxial substrates (<2 KV) and extremely high breakdown voltage on homo-epitaxial substrates (>2 KV).

Abstract: A microelectronic assembly in which a semiconductor device structure is directionally positioned on an off-axis substrate. In an illustrative implementation, a laser diode is oriented on a GaN substrate wherein the GaN substrate includes a GaN (0001) surface off-cut from the <0001>direction predominantly towards either the <11 20> or the <1 100> family of directions. For a <11 20> off-cut substrate, a laser diode cavity may be oriented along the <1 100> direction parallel to lattice surface steps of the substrate in order to have a cleaved laser facet that is orthogonal to the surface lattice steps. For a <1 100> off-cut substrate, the laser diode cavity may be oriented along the <1 100> direction orthogonal to lattice surface steps of the substrate in order to provide a cleaved laser facet that is aligned with the surface lattice steps.

Abstract: The present invention relates to various switching device structures including Schottky diode, P-N diode, and P-I-N diode, which are characterized by low defect density, low crack density, low pit density and sufficient thickness (>2.5 um) GaN layers of low dopant concentration (<1E16 cm?3) grown on a conductive GaN layer. The devices enable substantially higher breakdown voltage on hetero-epitaxial substrates (<2 KV) and extremely high breakdown voltage on homo-epitaxial substrates (>2 KV).

Abstract: A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer of improved epitaxial quality deposited on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V/III ratio in a range of from about 1 to about 105, nitrogen source material partial pressure in a range of from about 1 to about 103 torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 102 microns per hour.

Abstract: The present invention relates to various switching device structures including Schottky diode, P—N diode, and P—I—N diode, which are characterized by low defect density, low crack density, low pit density and sufficient thickness (>2.5 um) GaN layers of low dopant concentration (<1E16 cm?3) grown on a conductive GaN layer. The devices enable substantially higher breakdown voltage on hetero-epitaxial substrates (<2 KV) and extremely high breakdown voltage on homo-epitaxial substrates (>2 KV).

Abstract: A III-V nitride, e.g., GaN, substrate including a (0001) surface offcut from the <0001> direction predominantly toward a direction selected from the group consisting of <10-10> and <11-20> directions, at an offcut angle in a range that is from about 0.2 to about 10 degrees, wherein the surface has a RMS roughness measured by 50×50 ?m2 AFM scan that is less than 1 nm, and a dislocation density that is less than 3 E6 cm?2. The substrate may be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., of offcut sapphire. Both upper and lower surfaces may be offcut. The substrate is usefully employed for homoepitaxial deposition in the fabrication of III-V nitride-based microelectronic and opto-electronic devices.

Abstract: Large area single crystal III-V nitride material having an area of at least 2 cm2, having a uniformly low dislocation density not exceeding 3×106 dislocations per cm2 of growth surface area, and including a plurality of distinct regions having elevated impurity concentration, wherein each distinct region has at least one dimension greater than 50 microns, is disclosed. Such material can be formed on a substrate by a process including (i) a first phase of growing the III-V nitride material on the substrate under pitted growth conditions, e.g., forming pits over at least 50% of the growth surface of the III-V nitride material, wherein the pit density on the growth surface is at least 102 pits/cm2 of the growth surface, and (ii) a second phase of growing the III-V nitride material under pit-filling conditions.

Abstract: Large area single crystal III-V nitride material having an area of at least 2 cm2, having a uniformly low dislocation density not exceeding 3×106 dislocations per cm2 of growth surface area, and including a plurality of distinct regions having elevated impurity concentration, wherein each distinct region has at least one dimension greater than 50 microns, is disclosed. Such material can be formed on a substrate by a process including (i) a first phase of growing the III-V nitride material on the substrate under pitted growth conditions, e.g., forming pits over at least 50% of the growth surface of the III-V nitride material, wherein the pit density on the growth surface is at least 102 pits/cm2 of the growth surface, and (ii) a second phase of growing the III-V nitride material under pit-filling conditions.

Abstract: A microelectronic assembly in which a semiconductor device structure is directionally positioned on an off-axis substrate. In an illustrative implementation, a laser diode is oriented on a GaN substrate wherein the GaN substrate includes a GaN (0001) surface off-cut from the <0001> direction predominantly towards either the <11 20> or the <1 100> family of directions. For a <11 20> off-cut substrate, a laser diode cavity may be oriented along the <1 100> direction parallel to lattice surface steps of the substrate in order to have a cleaved laser facet that is orthogonal to the surface lattice steps. For a <1 100> off-cut substrate, the laser diode cavity may be oriented along the <1 100> direction orthogonal to lattice surface steps of the substrate in order to provide a cleaved laser facet that is aligned with the surface lattice steps.

Abstract: A boule formed by high rate vapor phase growth of Group III-V nitride boules (ingots) on native nitride seeds, from which wafers may be derived for fabrication of microelectronic device structures. The boule is of microelectronic device quality, e.g., having a transverse dimension greater than 1 centimeter, a length greater than 1 millimeter, and a top surface defect density of less than 107 defects cm?2. The Group III-V nitride boule may be formed by growing a Group III-V nitride material on a corresponding native Group III-V nitride seed crystal by vapor phase epitaxy at a growth rate above 20 micrometers per hour. Nuclear transmutation doping may be applied to an (Al,Ga,In)N article comprises a boule, wafer, or epitaxial layer.

Abstract: A microelectronic assembly in which a semiconductor device structure is directionally positioned on an off-axis substrate (201). In an illustrative implementation, a laser diode is oriented on a GaN substrate (201) wherein the GaN substrate includes a GaN (0001) surface off-cut from the <0001> direction predominantly towards either the <1120> or the <1100> family of directions. For a <1120> off-cut substrate, a laser diode cavity (207) may be oriented along the <1100> direction parallel to lattice surface steps (202) of the substrate (201) in order to have a cleaved laser facet that is orthogonal to the surface lattice steps. For <1100> off-cut substrate, the laser diode cavity may be oriented along the <1100> direction orthogonal to lattice surface steps (207) of the substrate (201) in order to provide a cleave laser facet that is aligned with the surface lattice steps.

Abstract: Large area, uniformly low dislocation density single crystal III-V nitride material, e.g., gallium nitride having a large area of greater than 15 cm2, a thickness of at least 1 mm, an average dislocation density not exceeding 5E5 cm?2, and a dislocation density standard deviation ratio of less than 25%, and methods of forming same, are disclosed. Such material can be formed on a substrate by a process including (i) a first phase of growing the III-V nitride material on the substrate under pitted growth conditions, e.g., forming pits over at least 50% of the growth surface of the III-V nitride material, wherein the pit density on the growth surface is at least 102 pits/cm2 of the growth surface, and (ii) a second phase of growing the III-V nitride material under pit-filling conditions.

Abstract: The present invention relates to various switching device structures including Schottky diode, P—N diode, and P—I—N diode, which are characterized by low defect density, low crack density, low pit density and sufficient thickness (>2.5 um) GaN layers of low dopant concentration (<1E16 cm?3) grown on a conductive GaN layer. The devices enable substantially higher breakdown voltage on hetero-epitaxial substrates (<2 KV) and extremely high breakdown voltage on homo-epitaxial substrates (>2 KV).

Abstract: A boule formed by high rate vapor phase growth of Group III-V nitride boules (ingots) on native nitride seeds, from which wafers may be derived for fabrication of microelectronic device structures. The boule is of microelectronic device quality, e.g., having a transverse dimension greater than 1 centimeter, a length greater than 1 millimeter, and a top surface defect density of less than 107 defects cm?2. The Group III-V nitride boule may be formed by growing a Group III-V nitride material on a corresponding native Group III-V nitride seed crystal by vapor phase epitaxy at a growth rate above 20 micrometers per hour. Nuclear transmutation doping may be applied to an (Al,Ga,In)N article comprises a boule, wafer, or epitaxial layer.

Abstract: A substrate is provided including a growth surface that is offcut relative to a plane defined by a crystallographic orientation of the substrate at an offcut angle of about 5 degrees to about 45 degrees. A thermoelectric film is epitaxially grown on the growth surface. A crystallographic orientation of the thermoelectric film may be tilted about 5 degrees to about 30 degrees relative to the growth surface. The growth surface of the substrate may also be patterned to define a plurality of mesas protruding therefrom prior to epitaxial growth of the thermoelectric film. Related methods and thermoelectric devices are also discussed.

Abstract: The present invention relates to various switching device structures including Schottky diode (10), P—N diode, and P—I—N diode, which are characterized by low defect density, low crack density, low pit density and sufficient thickness (>2.5 um) GaN layers (16) of low dopant concentration (<1E16 cm?3) grown on a conductive GaN layer (14). The devices enable substantially higher breakdown voltage on hetero-epitaxial substrates (<2 KV) and extremely high breakdown voltage on homo-epitaxial substrates (>2 KV).