Patents by Inventor Robert Paul Haase

Robert Paul Haase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220231163
    Abstract: A method for manufacturing a semiconductor transistor device includes etching a vertical gate trench into a silicon region, depositing a silicon gate material on an interlayer dielectric formed in the vertical gate trench so that an upper side of the interlayer dielectric is covered, etching through the silicon gate material in the vertical gate trench to partly uncover the upper side of the interlayer dielectric and so that a silicon gate region of a gate electrode of the semiconductor transistor device remains in the vertical gate trench, and depositing a metal material into the vertical gate trench so that the partly uncovered upper side of the interlayer dielectric is covered by the metal material.
    Type: Application
    Filed: April 6, 2022
    Publication date: July 21, 2022
    Inventors: Robert Paul Haase, Jyotshna Bhandari, Heimo Hofer, Ling Ma, Ashita Mirchandani, Harsh Naik, Martin Poelzl, Martin Henning Vielemeyer, Britta Wutte
  • Patent number: 11393907
    Abstract: A semiconductor device includes: a semiconductor substrate; trenches formed in the substrate and extending lengthwise in parallel with one another, the trenches having connecting regions which interconnect adjacent ones of the trenches; semiconductor mesas separated from one another by the trenches in a first lateral direction and by the connecting regions in a second lateral direction transverse to the first lateral direction; a gate electrode and a field electrode below the gate electrode in at least some of the trenches, and dielectrically insulated from each other and from the semiconductor substrate; first contacts vertically extending into one or more transistor device regions in the semiconductor mesas; and second contacts vertically extending into the field electrodes in the connecting regions such that the gate electrodes are uninterrupted by the second contacts. Corresponding methods of producing such a semiconductor device are also described.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: July 19, 2022
    Assignee: Infineon Technologies Austria AG
    Inventor: Robert Paul Haase
  • Patent number: 11316043
    Abstract: A transistor device with a gate electrode in a vertical gate trench is described. The gate electrode includes a silicon gate region and a metal inlay region. The silicon gate region forms at least a section of a sidewall of the gate electrode. The metal inlay region extends up from a lower end of the gate electrode.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: April 26, 2022
    Assignee: Infineon Technologies Austria AG
    Inventors: Robert Paul Haase, Jyotshna Bhandari, Heimo Hofer, Ling Ma, Ashita Mirchandani, Harsh Naik, Martin Poelzl, Martin Henning Vielemeyer, Britta Wutte
  • Publication number: 20220052164
    Abstract: A semiconductor device includes: a semiconductor substrate; trenches formed in the substrate and extending lengthwise in parallel with one another, the trenches having connecting regions which interconnect adjacent ones of the trenches; semiconductor mesas separated from one another by the trenches in a first lateral direction and by the connecting regions in a second lateral direction transverse to the first lateral direction; a gate electrode and a field electrode below the gate electrode in at least some of the trenches, and dielectrically insulated from each other and from the semiconductor substrate; first contacts vertically extending into one or more transistor device regions in the semiconductor mesas; and second contacts vertically extending into the field electrodes in the connecting regions such that the gate electrodes are uninterrupted by the second contacts. Corresponding methods of producing such a semiconductor device are also described.
    Type: Application
    Filed: August 12, 2020
    Publication date: February 17, 2022
    Inventor: Robert Paul Haase
  • Publication number: 20200203525
    Abstract: A transistor device with a gate electrode in a vertical gate trench is described. The gate electrode includes a silicon gate region and a metal inlay region. The silicon gate region forms at least a section of a sidewall of the gate electrode. The metal inlay region extends up from a lower end of the gate electrode.
    Type: Application
    Filed: December 17, 2019
    Publication date: June 25, 2020
    Inventors: Robert Paul Haase, Jyotshna Bhandari, Heimo Hofer, Ling Ma, Ashita Mirchandani, Harsh Naik, Martin Poelzl, Martin Henning Vielemeyer, Britta Wutte