Abstract: A bus bridge between a high speed computer processor bus and a high speed output bus. The preferred embodiment is a bus bridge between a GPUL bus for a GPUL PowerPC microprocessor from International Business Machines Corporation (IBM) and an output high speed interface (MPI). Another preferred embodiment is a bus bridge in a bus transceiver on a multi-chip module.

Abstract: A design structure embodied in a machine-readable medium is disclosed in one embodiment of the invention as including a flexible logic block to facilitate engineering changes at selected locations within an IC. The flexible logic block has a consistent and identifiable structure such that a simple automated process may be used to reconfigure the structure to perform different logical operations. In certain embodiments, the flexible logic block includes a circuit, such as a multiplexer, having multiple inputs and at least one output. A metal interconnect structure is coupled to the inputs and enables connection of each of the inputs to one of several electrical potentials using a focused-ion-beam (FIB) tool. In this way, the circuit may be configured to perform different logical operations after components in the IC exist in hardware.

Abstract: A method for bridging between a high speed computer processor bus and a high speed output bus. The preferred embodiment is a method for bridging between a GPUL bus for a GPUL PowerPC microprocessor from International Business Machines Corporation (IBM) and an output high speed interface (MPI).

Abstract: A bus bridge between a high speed computer processor bus and a high speed output bus. The preferred embodiment is a bus bridge between a GPUL bus for a GPUL PowerPC microprocessor from International Business Machines Corporation (IBM) and an output high speed interface (MPI). Another preferred embodiment is a bus bridge in a bus transceiver on a multi-chip module.

Abstract: A method and apparatus for a computer graphics rendering system which slices the traditional geometry pipeline into two phases to improve overall graphics system utilization is described. The graphics system consists of a host processor and a graphics adapter. The host creates work items and feeds them to the graphics adapter. In the two phase method, the first phase computes the clipping status and immediately returns this status information, before completion of the actual clipping, to the application running on the host processor to minimize stalling the host processor and hence the application. The second phase performs the rest of the work necessary to draw the objects on the screen. The advantage of two phase method is that the host processor minimizes its wait (but only for model/view transformation and clipping status determination) for a return status from the graphics adapter for the current work item and gets to create the next work item from the application sooner.

Abstract: While executing the standard graphics processing steps, problem polygons (i.e., those outside of a defined clip volume) are buffered for later processing, while the standard graphics processing continues, without the need for periodically reformatting data and performing clipping. After either a predefined number of polygons have been stored at the buffer location, or at such time as a change in the rendering state occurs, the buffered polygons are clipped.

Abstract: The present invention provides an apparatus for displaying an image of an object, as illuminated by a light source, on a display within a computer graphics display system. The image is graphically represented by a mesh of polygons and each polygon within the mesh has a surface defined by a set of vertices. The vertices define the surface of the polygon. The apparatus includes a processor, such as a rasterizer, that is responsive to each set of vertices for rendering each surface within the mesh of polygons in response to ambient lighting to produce a number of initially rendered surfaces within the mesh of polygons. Phong shading is utilized by the present invention. The processor produces a specular highlight contribution for each surface within the mesh of polygons utilizing a halfway vector, pointing from each surface to a direction halfway between a light vector and a vector pointing towards a viewpoint, associated with a vector normal to each surface.