Abstract: An integrated circuit in silicon on insulator technology comprises a JFET transistor with an insulated source and drain of one conductivity type in the upper part of a semiconductor island, an upper gate between the source and the drain, a buried insulating layer supporting the island, and a buried electrode in the island and in contact with the insulating layer. That electrode has a second conductivity type different from the first. A zone is diffused into at least one edge of the island from a conductive material covering the edge, that conductive material being doped with impurities of the second conductivity type. The diffused zone of the second conductivity type is electrically insulated from the source and drain and ensures the electrical contacting of the electrode and the conductive material constituting the electrical contact to the electrode and source. Drain and gate contacts are also provided which are electrically insulated from one another and from the electrode contact.

Abstract: A matrix display device applicable to liquid crystal displays comprises a display material having an optical property inserted between two insulating walls. On the inner face of one of the walls (1) are arranged n row conductors, m column conductors, p resistive conductors and p.k electrodes grouped into p=m.(n-1) packets of k electrodes each, the electrodes E.sub.1 . . . E.sub.k of one packet P.sub.ii'j being connected by switches I.sub.1 . . . I.sub.k to a column conductor C.sub.j and to a resistive conductor R.sub.ii'j, itself connected between two row conductors L.sub.i and L.sub.i', with i, i' and j being integers such that i.noteq.i', l.ltoreq.i<n, l<i.ltoreq.n and l.ltoreq.i.ltoreq.m. On the inner face of the other wall is placed a counterelectrode. A process for controlling the display device is also disclosed. The invention more particularly applies to liquid crystal display devices.