Abstract: Processing methods and systems using vapor phase processing streams made from a liquid phase source and feed gas. Some versions use multiple liquid sources and multiple vapor generators which each produce vapors which are mixed. Some of the vapor generators use metering pumps to inject a controlled flow of liquid into a controlled flow of feed gas. In some embodiments the vapors are exsiccated to reduce saturation before being introduced as a processing chamber vapor mixture into a processing chamber. The semiconductor pieces are preferably rotated within the processing chamber and can be processed in batches.

Abstract: A cathode current control system employing a current thief for use in electroplating a wafer is set forth. The current thief comprises a plurality of conductive segments disposed to substantially surround a peripheral region of the wafer. A first plurality of resistance devices are used, each associated with a respective one of the plurality of conductive segments. The resistance devices are used to regulate current through the respective conductive finger during electroplating of the wafer. Various constructions are used for the current thief and further conductive elements, such as fingers, may also be employed in the system. As with the conductive segments, current through the fingers may also be individually controlled. In accordance with one embodiment of the overall system, selection of the resistance of each respective resistance devices is automatically controlled in accordance with predetermined programming.

Abstract: A manufacturing tool configuration for applying one or more levels of interconnect metallization to a generally planar dielectric surface of a workpiece with a minimal number of workpiece transfer operations between the tool sets is disclosed. The tool configuration comprises a film deposition tool set, a hard mask formation tool set, a hard mask etching tool set, a pattern processing tool set, a wet processing tool set, and a dielectric processing tool set. The film deposition tool set is used to deposit a conductive barrier layer exterior to the planar dielectric surface of the workpiece and a conductive seed layer exterior to the barrier layer. The hard mask formation tool set is used to form a hard mask dielectric layer exterior to the seed layer in accordance with one of the disclosed processes, and to form a still further hard mask dielectric layer exterior to the hard mask dielectric layer.

Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.

Abstract: A cathode current control system employing a current thief for use in electroplating a wafer is set forth. The current thief comprises a plurality of conductive segments disposed to substantially surround a peripheral region of the wafer. A first plurality of resistance devices are used, each associated with a respective one of the plurality of conductive segments. The resistance devices are used to regulate current through the respective conductive finger during electroplating of the wafer. Various constructions are used for the current thief and further conductive elements, such as fingers, may also be employed in the system. As with the conductive segments, current through the fingers may also be individually controlled. In accordance with one embodiment of the overall system, selection of the resistance of each respective resistance devices is automatically controlled in accordance with predetermined programming.

Abstract: Methods used in semiconductor electroplating systems, such as for plating copper, onto a semiconductor wafer or other semiconductor workpiece. The methods apply to patterned metal layers plated onto a seed layer which is partially protected by an overlying photoresist or other coating. The methods employ an electrode assembly which has a boot which seals about a contact face of the electrode. The sealing is performed by engaging the seal against photoresist to prevent corrosion of the seal layer. The area enclosed by the sealing includes a via which is surrounded by the seal. The electrode contact extends through the via to provide electrical contact with the metallic seed layer. Plating of copper or other metal proceeds at exposed seed layer areas.

Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.

Abstract: Processing methods and systems using vapor phase processing streams made from a liquid phase source and feed gas. Some versions use multiple liquid sources and multiple vapor generators which each produce vapors which are mixed. Some of the vapor generators use metering pumps to inject a controlled flow of liquid into a controlled flow of feed gas. In some embodiments the vapors are exsiccated to reduce saturation before being introduced as a processing chamber vapor mixture into a processing chamber. The semiconductor pieces are preferably rotated within the processing chamber and can be processed in batches.

Abstract: A processor for processing semiconductor articles, such as integrated circuit wafers, flat panel displays, semiconductor substrates, and data disks. The processor has an interface section which receives articles in article carriers. The interface section transfers the articles from carriers into processing arrays. A conveyor having an automated arm assembly moves article arrays to and between processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.

Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.

Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.

Abstract: A processor for processing semiconductor articles, such as integrated circuit wafers, flat panel displays, semiconductor substrates, and data disks. The processor has an interface section which receives articles in article carriers. The interface section transfers the articles from carriers into processing arrays. A conveyor having an automated arm assembly moves article arrays to and between processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.

Abstract: A centrifugal semiconductor processing system having a rotor which holds articles for centrifugal processing. The rotor includes a rotor frame with a receiver for holding the wafers or other articles in a spaced array without a wafer carrier to improve fluid access to the wafers. The rotor also has one or more retainers which are pivoted relative to the rotor to controllably urge the wafers into their desired processing positions. The retainers are preferably constructed to provide initial spring biasing with added restraining forces being generated during rotation. The processing system also preferably includes an implement mounted on a robot for loading the rotor, and a vision system to aid in the loading operation.

Abstract: A workpiece support for supporting a semiconductor workpiece in a semiconductor processing machine is disclosed. The workpiece support has an operator base which essentially forms a yoke having two yoke arms. An operator arm having two fork arms is pivotally mounted between the two yoke arms of the operator base such that the fork arms are protruding. A processing head having a workpiece holder is rotatably mounted between the two protruding fork arms. The processing head may rotate about the fork arms to present the workpiece holder in a position to receive a workpiece or to deploy the workpiece in the semiconductor manufacturing process. The operator arm which pivots about the operator base yoke arms is used to lower the processing head and the workpiece into the process. Both the processing head and the operator arm are supported along horizontal axes having at least two points of support distally separated for stability.

Abstract: A processor for processing semiconductor articles, such as integrated circuit wafers, flat panel displays, semiconductor substrates, and data disks. The processor has an interface section which receives articles in article carriers. The interface section transfers the articles from carriers into processing arrays. A conveyor having an automated arm assembly moves article arrays to and between processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.

Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.

Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto trays for processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.