Patents by Inventor Robert W. Bierig

Robert W. Bierig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4635062
    Abstract: A transceiver element for controlling the phase of a microwave signal passing therethrough. The transceiver element includes a plurality of switching means arranged to steer a microwave frequency signal provided by a radar system through a nonreciprocal phase shifter to a phased array antenna during a transmit mode, and to steer a microwave frequency signal received by the phased array antenna through the nonreciprocal phase shifter to the radar system during a receive mode. The microwave frequency signal passes through the phase shifter in the same direction during both the transmit and receive modes. A set of control signals is fed to such switching means and the phase shifter of the transceiver element to provide collimated and directed beams of microwave energy during the transmit mode and the receive mode.
    Type: Grant
    Filed: December 10, 1984
    Date of Patent: January 6, 1987
    Assignee: Raytheon Company
    Inventors: Robert W. Bierig, Robert A. Pucel
  • Patent number: 4599585
    Abstract: A n-bit digitally controlled phase shifter for controlling the phase of an applied signal over the range of 0.degree. to 360.degree. includes n, cascade interconnected phase shifter stages. Each phase shifter stage is formed on a semi-insulating substrate having a pair of field effect transistors and a pair of transmission lines formed thereon. Each field effect transistor (FET), includes a pair of gate electrodes, a drain electrode, and a source electrode, connected in a common (grounded) source configuration. Each transmission line is coupled between a corresponding one of the drain electrodes and a common output port. The lengths of the transmission lines are selected to provide two paths having an electrical pathlength corresponding to a phase shift of .phi..sub.1 or a phase shift of .phi..sub.1 +.DELTA..phi..sub.1 where .DELTA..phi..sub.i is the phase shift increment of the i.sup.th stage. A first one of the gate electrodes of each field effect transistor is fed by the applied signal.
    Type: Grant
    Filed: April 23, 1984
    Date of Patent: July 8, 1986
    Assignee: Raytheon Company
    Inventors: James L. Vorhaus, Robert W. Bierig, Robert A. Pucel
  • Patent number: 4201604
    Abstract: A modified Read-type diode having an extremely thin doping spike and with the electric field in the drift region terminated before the buffer zone. The buffer zone and a drift region are first grown upon a doped semiconductor substrate using epitaxial vapor deposition growth techniques employing a furnace tube within a multiple temperature zone reaction furnace. The doping spike is produced by injecting under pressure a fixed predetermined volume of dopant into the furnace tube. An avalanche region is grown over the doping spike and a Schottky barrier contact or semiconducting material of the opposite conductivity type grown over the avalanche region. Avalanche regions having a length less than 15% of the total active length of the device and doping spikes having a width of 500 A or less are disclosed in a high-efficiency device.
    Type: Grant
    Filed: September 8, 1976
    Date of Patent: May 6, 1980
    Assignee: Raytheon Company
    Inventors: Robert W. Bierig, S. Robert Steele
  • Patent number: 4089734
    Abstract: A fusing technique whereby a fuse is fabricated upon a substrate by integrated circuit techniques. Three or more layers of chemically dissimilar metals are deposited upon the region where the fuse is to be formed. The top layers are then etched away from the region where the fusible link is to be formed leaving the lower two layers, the top one of which forms the actual fusible link. The lower layer is then etched away leaving the fusible link suspended from the underlying substrate. The current necessary to cause such a fuse to blow is consistent from fuse to fuse since the physical dimensions of the fusible link can accurately be controlled with the integrated circuit techniques used and, since the fusible link is not in contact with the substrate, the rate at which heat is conducted away from the fusible link cannot vary from fuse to fuse.
    Type: Grant
    Filed: February 3, 1977
    Date of Patent: May 16, 1978
    Assignee: Raytheon Company
    Inventor: Robert W. Bierig
  • Patent number: 4032949
    Abstract: A fusing technique whereby a fuse is fabricated upon a substrate by integrated circuit techniques. Three or more layers of chemically dissimilar metals are depositedupon the region where the fuse is to be formed. The top layers are then etched away from the region where the fusible link is to be formed leaving the lower two layers, the top one of which forms the actual fusible link. The lower layer is then etched away leaving the fusible link suspended from the underlying substrate. The current necessary to cause such a fuse to blow is consistent from fuse to fuse since the physical dimensions of the fusible link can accurately be controlled with the integrated circuit techniques used and, since the fusible link is not in contact with the substrate, the rate at which heat is conducted away from the fusible link cannot vary from fuse to fuse.
    Type: Grant
    Filed: October 18, 1976
    Date of Patent: June 28, 1977
    Assignee: Raytheon Company
    Inventor: Robert W. Bierig