Patents by Inventor Rodney Pelzel
Rodney Pelzel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230326743Abstract: A method of forming a layer includes introducing a Group III precursor in a reactor, introducing a hydride Group V precursor in the reactor, and introducing a metal-organic Group V precursor in the reactor to form the layer. The method can further include mixing the hydride Group V precursor and the metal-organic Group V precursor. Advantageously, the layer and method of forming the layer utilize mixed Group V precursors, improve uniformity, decrease thermal sensitivity of the end material, normalize concentration profiles of precursors, improve yield, increase manufacturing efficiency, improve control of III-V ratios (e.g., pressure, growth rate, flux), and reduce manufacturing costs.Type: ApplicationFiled: March 30, 2023Publication date: October 12, 2023Inventors: Matthew GEEN, Rodney PELZEL
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Patent number: 11757008Abstract: Layered structures described herein include electronic devices with 2-dimensional electron gas between polar-oriented cubic rare-earth oxide layers on a non-polar semiconductor. Layered structure includes a semiconductor device, comprising a III-N layer or rare-earth layer, a polar rare-earth oxide layer grown over the III-N layer or rare-earth layer, a gate terminal deposited or grown over the polar rare-earth oxide layer, a source terminal that is deposited or epitaxially grown over the layer, and a drain terminal that is deposited or grown over the layer.Type: GrantFiled: February 15, 2019Date of Patent: September 12, 2023Assignee: IQE plcInventors: Rytis Dargis, Andrew Clark, Richard Hammond, Rodney Pelzel, Michael Lebby
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Publication number: 20230245884Abstract: A method of fabricating a layered structure comprising growing an epitaxial layer on a substrate with a first resistivity proximal to the substrate and a second resistivity (less than the first) distal therefrom. Porosify the epitaxial layer to form a porous layer with porosity >30% proximal to the substrate and ?25% distal from the substrate. Epitaxially grow a semiconductor (channel) layer over the porous layer. Also a layered structure comprising: a substrate; a porous layer; and an epitaxial semiconductor (channel) layer. The porous layer has a first porosity >30% proximal to the substrate and a second porosity ?25% adjacent to the semiconductor layer. The two different porosities can be optimized. The higher porosity is effective at insulating the channel from the substrate. The lower porosity provides a crystalline structure with single crystal orientation exposed that supports the channel layer comprising high quality, low defect, epitaxial growth.Type: ApplicationFiled: January 30, 2023Publication date: August 3, 2023Inventors: Richard HAMMOND, Andrew CLARK, Rodney PELZEL
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Patent number: 11611001Abstract: A layered structure (100) for transmission of an acoustic wave, the layered structure (100) comprising: a substrate layer (102); and a second layer (104) over the substrate layer (102), wherein the second layer (104) comprises a plurality of discrete portions (105) adjacent to each other, each discrete portion (105) of the plurality of discrete portions (105) comprising a first subregion (104A) and a second subregion (104B). Also an epitaxial layer (108), grown over the second layer (104), for transmission of the acoustic wave in a major plane of the epitaxial layer (108), wherein a periodicity (?) of a wavelength of the acoustic wave to be transmitted through the epitaxial layer (108) is approximately equal to a sum of a width (dA) of the first subregion (104A) and a width (dB) of the second subregion (104B).Type: GrantFiled: April 14, 2021Date of Patent: March 21, 2023Assignee: IQE plcInventors: Andrew Clark, Rodney Pelzel, Richard Hammond
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Patent number: 11495670Abstract: Systems and methods are described herein to include an epitaxial metal layer between a rare earth oxide and a semiconductor layer. Systems and methods are described to grow a layered structure, comprising a substrate, a first rare earth oxide layer epitaxially grown over the substrate, a first metal layer epitaxially grown over the rare earth oxide layer, and a first semiconductor layer epitaxially grown over the first metal layer. Specifically, the substrate may include a porous portion, which is usually aligned with the metal layer, with or without a rare earth oxide layer in between.Type: GrantFiled: January 25, 2019Date of Patent: November 8, 2022Assignee: IQE plcInventors: Rodney Pelzel, Andrew Clark, Rytis Dargis, Michael Lebby, Richard Hammond
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Publication number: 20220254631Abstract: A layered structure includes a substrate, a porous layer over the substrate, an epitaxial layer grown directly over the porous layer, and a semiconductor device in the epitaxial layer. The porous layer has a higher resistivity than the substrate. A porosity of the porous layer reduces radio frequency (RF) bleeding from the semiconductor device into the substrate.Type: ApplicationFiled: April 29, 2022Publication date: August 11, 2022Inventors: Richard HAMMOND, Drew Nelson, Alan Gott, Rodney Pelzel, Andrew Clark
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Patent number: 11355340Abstract: A layered structure for semiconductor application is described herein. The layered structure includes a starting material and a fully depleted porous layer formed over the starting material with high resistivity. In some embodiments, the layered structure further includes epitaxial layer grown over the fully depleted porous layer. Additionally, a process of making the layered structure including forming the fully depleted porous layer and epitaxial layer grown over the porous layer is described herein.Type: GrantFiled: January 14, 2020Date of Patent: June 7, 2022Assignee: IQE plcInventors: Richard Hammond, Drew Nelson, Alan Gott, Rodney Pelzel, Andrew Clark
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Publication number: 20220102504Abstract: A layered structure for semiconductor application is described herein. The layered structure includes III-V semiconductor and uses pnictide nanocomposites to control lattice distortion in a series of layers. The distortion is tuned to bridge lattice mismatch between binary III-V semiconductors. In some embodiments, the layered structure further includes dislocation filters.Type: ApplicationFiled: February 7, 2020Publication date: March 31, 2022Inventors: Andrew CLARK, Rodney PELZEL, Mukul DEBNATH, Rytis DARGIS, Robert YANKA
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Patent number: 11201451Abstract: Embodiments described herein provide a layered structure that comprises a substrate that includes a first porous multilayer of a first porosity, an active quantum well capping layer epitaxially grown over the first porous multilayer, and a second porous multilayer of the first porosity over the active quantum well capping layer, where the second porous multilayer aligns with the first porous multilayer.Type: GrantFiled: January 18, 2019Date of Patent: December 14, 2021Assignee: IQE plcInventors: Rich Hammond, Rodney Pelzel, Drew Nelson, Andrew Clark, David Cheskis, Michael Lebby
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Publication number: 20210320214Abstract: A layered structure (100) for transmission of an acoustic wave, the layered structure (100) comprising: a substrate layer (102); and a second layer (104) over the substrate layer (102), wherein the second layer (104) comprises a plurality of discrete portions (105) adjacent to each other, each discrete portion (105) of the plurality of discrete portions (105) comprising a first subregion (104A) and a second subregion (104B). Also an epitaxial layer (108), grown over the second layer (104), for transmission of the acoustic wave in a major plane of the epitaxial layer (108), wherein a periodicity (?) of a wavelength of the acoustic wave to be transmitted through the epitaxial layer (108) is approximately equal to a sum of a width (dA) of the first subregion (104A) and a width (dB) of the second subregion (104B).Type: ApplicationFiled: April 14, 2021Publication date: October 14, 2021Inventors: Andrew CLARK, Rodney PELZEL, Richard HAMMOND
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Patent number: 11133389Abstract: A layered structure for semiconductor application is described herein. The layered structure includes III-V semiconductor and uses pnictide nanocomposites to control lattice distortion in a series of layers. The distortion is tuned to bridge lattice mismatch between binary III-V semiconductors. In some embodiments, the layered structure further includes dislocation filters.Type: GrantFiled: February 5, 2020Date of Patent: September 28, 2021Assignee: IQE plcInventors: Andrew Clark, Rodney Pelzel, Mukul Debnath, Rytis Dargis, Robert Yanka
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Publication number: 20210257809Abstract: Systems and methods are described herein to grow a layered structure. The layered structure is implemented as a VCSEL and comprises a first germanium substrate layer having a first lattice constant, a second layer that has a second lattice constant and is epitaxially grown over the first germanium substrate layer, wherein the second layer comprises a compound of a first constituent and a second constituent, and a third layer that has a third lattice constant and is epitaxially grown over the second layer, wherein the third layer comprises a compound of a third constituent and a fourth constituent, wherein the first, second, third and fourth constituents are selected such that the layered structure is pseudomorphic and the first lattice constant is between the second lattice constant and the third lattice constant.Type: ApplicationFiled: March 31, 2021Publication date: August 19, 2021Applicant: IQE plcInventors: Andrew CLARK, Rodney PELZEL, Andrew JOHNSON, Andrew Martin JOEL, Aidan John DALY, Adam Christopher JANDL
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Patent number: 11063114Abstract: In view of the high-temperature issues in III-N layer growth process, embodiments described herein use layered structure including a rare earth oxide (REO) or rare earth nitride (REN) buffer layer and a polymorphic III-N-RE transition layer to transit from a REO layer to a III-N layer. In some embodiments, the piezoelectric coefficient of III-N layer is increased by introduction of additional strain in the layered structure. The polymorphism of RE-III-N nitrides can then be used for lattice matching with the III-N layer.Type: GrantFiled: November 19, 2019Date of Patent: July 13, 2021Assignee: IQE plcInventors: Rytis Dargis, Andrew Clark, Rodney Pelzel, Michael Lebby, Robert Yanka
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Patent number: 11005231Abstract: Systems and methods are described herein to grow a layered structure. The layered structure comprises a first germanium substrate layer having a first lattice constant, a second layer that has a second lattice constant and is epitaxially grown over the first germanium substrate layer, wherein the second layer has a composite of a first constituent and a second constituent, and has a first ratio between the first constituent and the second constituent, and a third layer that has a third lattice constant and is epitaxially grown over the second layer, wherein the third layer has a composite of a third constituent and a fourth constituent, and has a second ratio between the third constituent and the fourth constituent, wherein the first ratio and the second ratio are selected such that the first lattice constant is between the second lattice constant and the third lattice constant.Type: GrantFiled: November 21, 2018Date of Patent: May 11, 2021Assignee: IQE picInventors: Andrew Clark, Rodney Pelzel, Andrew Johnson, Andrew Martin Joel, Aidan John Daly, Adam Christopher Jandl
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Patent number: 10923345Abstract: Systems and methods are described herein for growing epitaxial metal oxide as buffer for epitaxial III-V layers. A layer structure includes a base layer and a first rare earth oxide layer epitaxially grown over the base layer. The first rare earth oxide layer includes a first rare earth element and oxygen, and has a bixbyite crystal structure. The layer structure also includes a metal oxide layer epitaxially grown directly over the first rare earth oxide layer. The metal oxide layer includes a first cation element selected from Group III and oxygen, and has a bixbyite crystal structure.Type: GrantFiled: March 16, 2017Date of Patent: February 16, 2021Assignee: IQE plcInventors: Rytis Dargis, Andrew Clark, Rodney Pelzel
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Publication number: 20210020436Abstract: A layered structure for semiconductor application is described herein. The layered structure includes a starting material and a fully depleted porous layer formed over the starting material with high resistivity. In some embodiments, the layered structure further includes epitaxial layer grown over the fully depleted porous layer. Additionally, a process of making the layered structure including forming the fully depleted porous layer and epitaxial layer grown over the porous layer is described herein.Type: ApplicationFiled: January 14, 2020Publication date: January 21, 2021Inventors: Richard Hammond, Drew Nelson, Alan Gott, Rodney Pelzel, Andrew Clark
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Publication number: 20210005720Abstract: Layered structures described herein include electronic devices with 2-dimensional electron gas between polar-oriented cubic rare-earth oxide layers on a non-polar semiconductor. Layered structure includes a semiconductor device, comprising a III-N layer or rare-earth layer, a polar rare-earth oxide layer grown over the III-N layer or rare-earth layer, a gate terminal deposited or grown over the polar rare-earth oxide layer, a source terminal that is deposited or epitaxially grown over the layer, and a drain terminal that is deposited or grown over the layer.Type: ApplicationFiled: February 15, 2019Publication date: January 7, 2021Inventors: Rytis Dargis, Andrew Clark, Richard Hammond, Rodney Pelzel, Michael Lebby
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Publication number: 20200388489Abstract: Structures having an epitaxial metal layer, a semiconductor layer, or both, may be formed as part of a first process in a first chamber, and then undergo subsequent processing in a second chamber. A modified device may be formed from a pre-formed device by application of further layers in a second process. One or more layers may be formed directly over the device, formed directly over a seed layer formed over the device, or formed over a substrate that is subsequently bonded and partially cleaved from the device. A seed layer may include a lattice constant transition, chemical transition, or other suitable transition between the device and an epitaxial layer. A cleave layer may include a porous layer configured to fracture at a relatively lower shear loading than the rest of the structure, thus providing a predictable separation plane.Type: ApplicationFiled: June 6, 2019Publication date: December 10, 2020Inventors: Rodney Pelzel, Andrew Clark, Rytis Dargis
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Patent number: 10825912Abstract: Systems and methods are described herein to include an epitaxial metal layer between a rare earth oxide and a semiconductor layer. Systems and methods are described to grow a layered structure, comprising a substrate, a first rare earth oxide layer epitaxially grown over the substrate, a first metal layer epitaxially grown over the rare earth oxide layer, and a first semiconductor layer epitaxially grown over the first metal layer.Type: GrantFiled: November 1, 2018Date of Patent: November 3, 2020Assignee: IQE plcInventors: Rodney Pelzel, Andrew Clark, Rytis Dargis, Patrick Chin, Michael Lebby
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Publication number: 20200266276Abstract: A layered structure for semiconductor application is described herein. The layered structure includes III-V semiconductor and uses pnictide nanocomposites to control lattice distortion in a series of layers. The distortion is tuned to bridge lattice mismatch between binary III-V semiconductors. In some embodiments, the layered structure further includes dislocation filters.Type: ApplicationFiled: February 5, 2020Publication date: August 20, 2020Inventors: Andrew Clark, Rodney Pelzel, Mukul Debnath, Rytis Dargis, Robert Yanka