Abstract: A technique is disclosed which facilitates the layout of op amp cells, for example, two-stage op amp cells or three-stage op amp cells, to provide larger operational amplifiers. In accordance with one aspect, the op amp cells can be suitably coupled in parallel to provide a larger operational amplifier. This paralleling aspect can be facilitated by connecting the respective negative and positive inputs of a predetermined number of input gm stages together, connecting the outputs of a predetermined number of output gm stages together, and connecting a predetermined number of intermediate internal nodes between the input gm stages and the output gm stages together, without the occurrence of saturation of the internal nodes. In addition, the input and output characteristics of operational amplifier can be suitably improved.

Abstract: An instrumentation amplifier is provided which can provide high common mode rejection without the use of precision resistors. The instrumentation amplifier can be configured in an 8-pin layout, such as, for example, for an MSOP-8 or SO-8 surface mount package. In addition, an instrumentation amplifier can be provided which can effectively cancel the differential mode signal created by common mode input signals, such as those caused by parasitic capacitance and the like. As a result, the instrumentation amplifier can exhibit excellent AC as well as DC common mode rejection. In accordance with an exemplary embodiment, an instrumentation amplifier can comprise two pairs of current mirrors configured with two buffers to suitably add the differential current-mode signals and subtract the common current mode signals of each buffer to thereby cancel the differential mode signal created by common mode input signals, such as those caused by the parasitic capacitances within the instrumentation amplifier.

Abstract: A circuit is provided that can provide, in a single package, a means to monitor a sensing element which uses a variable resistor. The circuit (also known as a signal conditioning circuit) may contain resistor input terminals to which a reference set resistor and a resistive sensor can be attached. A reference voltage signal can be applied to both terminals. There are also means for sensing the resulting current flowing through both the set resistor and the resistive sensor. The difference of the currents flowing through each element can then be monitored as being indicative of the difference in resistance between the set resistor and the resistive sensor. The current difference signal can be used to generate a voltage difference signal indicative of the difference in resistance between the set resistor and the resistive sensor. The signal conditioning circuit may be used to adjust the temperature of various devices.

Abstract: A method and apparatus for auto-calibrating an electronic device without interrupting normal operation of the device. An electronic device configured as a high voltage difference amplifier is disclosed having a calibration circuit which couples a calibration excitation signal to a common-mode signal path of the difference amplifier. The difference amplifier includes a variable transfer function circuit which may be used to adjust the common-mode rejection of the difference amplifier. The calibration excitation signal may be a random, pseudo-random, out-of-band, or other frequency shaped signal generated in reference to a clock signal. A calibration error signal is detected from an output signal. The variable transfer function circuit can be adjusted in response to the detected error signal to reduce the calibration error signal. As a result, common-mode rejection errors of the difference amplifier may be reduced while the difference amplifier is coupled to an input signal source.

Abstract: An instrumentation amplifier is provided which can provide high common mode rejection without the use of precision resistors. The instrumentation amplifier can be configured in an 8-pin layout, such as, for example, for an MSOP-8 or SO-8 surface mount package. In addition, an instrumentation amplifier can be provided which can effectively cancel the differential mode signal created by common mode input signals, such as those caused by parasitic capacitance and the like. As a result, the instrumentation amplifier can exhibit excellent AC as well as DC common mode rejection. In accordance with an exemplary embodiment, an instrumentation amplifier can comprise two pairs of current mirrors configured with two buffers to suitably add the differential current-mode signals and subtract the common current mode signals of each buffer to thereby cancel the differential mode signal created by common mode input signals, such as those caused by the parasitic capacitances within the instrumentation amplifier.

Abstract: A low drop out voltage regulator includes an error amplifier (12) having a first input coupled to a first reference voltage (VREF), a second input receiving a feedback signal, and an output (15) producing an output signal (VAMPOUT). An output transistor (18) has a gate, a drain coupled to an unregulated input voltage (VIN), and a source coupled to produce a regulated output voltage (VOUT) on an output conductor (19). A feedback circuit (20,22) is coupled between the output conductor (19) and a reference voltage (GND) to produce the feedback signal. A capacitor (16) is coupled between the output (15) of the error amplifier and the gate (17) of the output transistor (18). A servo amplifier (24) has a first input coupled to a second reference voltage (VVREF), a second input coupled to the output (15) of the error amplifier. A low current charge pump circuit (26B) supplies an output current into a supply voltage terminal of the servo amplifier.

Abstract: An integrated circuit photodetector includes a transimpedance amplifier including a differential amplifier stage with PNP emitter-coupled transistors and a PNP input transistor which are biased only by base currents of the emitter-coupled transistors, to achieve low input bias current. Low noise operation is achieved by bypass capacitors coupled between the bases and emitters of the input transistors, respectively. A constant current source supplies a current which develops a small pedestal voltage across a resistor to bias the non-inverting input of the transimpedance amplifier so as to avoid nonlinear amplification of low level light signals. A positively biased N-type guard tub surrounds the photodetector, which is formed in a junction-isolated N region on a P substrate, to collect electrons generated in the substrate by deep-penetrating IR light to prevent them from causing amplification errors.

Abstract: An integrated circuit photodetector includes a transimpedance amplifier including a differential amplifier stage with PNP emitter-coupled transistors and a PNP input transistor which are biased only by base currents of the emitter-coupled transistors, to achieve low input bias current. Low noise operation is achieved by bypass capacitors coupled between the bases and emitters of the input transistors, respectively. A constant current source supplies a current which develops a small pedestal voltage across a resistor to bias the non-inverting input of the transimpedance amplifier so as to avoid nonlinear amplification of low level light signals. A positively biased N-type guard tub surrounds the photodetector, which is formed in a junction-isolated N region on a P substrate, to collect electrons generated in the substrate by deep-penetrating IR light to prevent them from causing amplification errors.

Abstract: A circuit for reducing input offset error and improving gain switching speed in a programmable gain amplifier includes a level shifting buffer that senses a signal on a common mode conductor in a differential input stage of an operational amplifier, and shifts the level of that signal up to the level corresponding to a level of an input signal applied to a non-inverting input of the operational amplifier. If a gain select signal is at a first logic level, the voltage produced by the buffer is applied to a gate electrode of one of a plurality of gain switching JFETs coupling a gain network to the inverting input of the operational amplifier, turning that JFET on. If the gain select signal is at a second logic level, the output of the buffer is isolated from the gain switching JFET and a turn off voltage is applied to the gate of the gain switching JFET.

Abstract: A current-integrating analog-to-digital converter includes a comparator having a non-inverting input coupled to a ground voltage and an inverting input coupled to an input conductor carrying an analog input current. An integrating capacitor having one terminal coupled to the input conductor and another terminal coupled to an output of a digital-to-analog converter. A tracking circuit is coupled to an output of the comparator to apply digital signals to inputs of the digital-to-analog converter to maintain the inverting input close to a virtual ground voltage. A digital filter filters the digital signals to produce a digital output signal that precisely represents the input current.

Abstract: A high speed, high current analog switching circuit includes a switch JFET having its drain electrode connected to an analog input voltage terminal and a source electrode connected to an analog output voltage terminal. The gate electrode of the JFET switch is connected to switching control circuitry. The analog switching circuit includes circuitry that prevents the source-gate PN junction of the switch JFET from ever being forward biased more than approximately 0.2 volts. This prevents the charge storage capacitance of that PN junction from ever increasing to such high values (e.g. 100 to 1000 picofarads) that discharging of the charge storage capacitance through the channel resistance of the switch JFET takes excessively long periods of time. Rapid equalization of the analog output voltage and analog input voltage to within approximately 10 microvolts of each other is thereby achieved.

Abstract: A dual successive approximation analog-to-digital converter, including circuitry for generating separate reference voltages for each analog-to-digital converter, is integrated onto a single semiconductor chip. A single successive approximation register including a 19 bit shift register and two 18 bit latches and associated gating circuitry operates to produce two sets of 18 successive approximation numbers, one supplied as successive digital inputs to a CDAC of one of the analog-to-digital converters and the other set of successive approximation numbers being applied as digital inputs to a CDAC of the other analog-to-digital converter. A CMOS comparator includes two high speed, low gain differential amplifier stages, the first including cascode MOSFETs to provide a high power supply rejection.

Abstract: Circuitry for reducing harmonic distortion in an amplifier includes a first transistor having a first non-linear collector-to-substrate capacitance, a first load device coupled to a collector of the first transistor, a first current source coupled to an emitter of the first transistor, a first conductor conducting an input voltage coupled to a base of the first transistor, and a second conductor coupled to the first load device and conducting an output voltage of the amplifier. The first transistor produces a first non-linear current in the first non-linear collector-to-substrate capacitance in response to the input voltage. A second transistor has a second non-linear collector-to-substrate capacitance. A second current source is coupled to an emitter of the second transistor. The first conductor is coupled to apply the input voltage to a base of the second transistor.

Abstract: A dual successive approximation analog-to-digital converter, including circuitry for generating separate reference voltages for each analog-to-digital converter, is integrated onto a single semiconductor chip. A single successive approximation register including a 19 bit shift register and two 18 bit latches and associated gating circuitry operates to produce two sets of 18 successive approximation numbers, one supplied as successive digital inputs to a CDAC of one of the analog-to-digital converters and the other set of successive approximation numbers being applied as digital inputs to a CDAC of the other analog-to-digital converter. A CMOS comparator includes two high speed, low gain differential amplifier stages, the first including cascode MOSFETs to provide a high power supply rejection.

Abstract: A common-base, source-driven differential amplifier achieves both high speed operation and low noise operation by providing an input stage including a pair of source follower JFETs that drive emitters of a pair of NPN input transistors having their bases connected together and to a bias circuit. The collectors of the NPN transistors each are connected to a corresponding load device and to a corresponding input of an output amplifier stage. The bias circuit includes a current source and a pair of diode-connected NPN transistors having their bases and collectors connected to the current source and to the bases of the input transistors. The emitters of the diode-connected NPN transistors are connected to sources of a second pair of source follower JFETs, the gates of which are connected to the input terminals.

Abstract: An isolation amplifier includes a voltage-to-duty-cycle modulator, a non-galvanic isolation barrier, and a demodulator converting a duty-cycle-modulated signal transmitted across the isolation barrier to an analog voltage replica of the analog input voltage. The modulator circuit includes a first current switching means which produces a first current that is switched between positive and negative values in response to an output from a comparator that can be referenced to a noise-synchronized signal. The first current is summed with an input current and the difference is integrated and input to the comparator, the output of which produces the duty-cycle-modulated signal.

Abstract: A two-terminal temperature-compensated current source includes a first transistor having its emitter connected to a first terminal, its base connected to the base of a second transistor, and its collector coupled to a current mirror. The second transistor has its emitter coupled to the first terminal by a first resistor and its collector coupled to the current mirror. A second resistor is coupled between the first terminal and the base of the first transistor. The current mirror is coupled between a second terminal and the collectors of the first and second transistors so that all current supplied to the current mirror from the second terminal flows into the collectors of the first and second transistors. A third transistor has its base coupled to the collector of the first transistor, its emitter coupled to the base of the first transistor, and its collector coupled to the second terminal.

Abstract: Method and apparatus for minimizing unpredictable sources of noise, or error voltages, at the microvolt level in precision analog components such as operational amplifiers is described. Sources of such error voltages are temperature gradients across the dice of the precision components enclosed in a hermetically sealed package, thermoelectric voltages caused by temperature differences between junctions of leads of the package with other metals, and light reflected from the substrate through the glass seals around the leads in the base of such packages. A skirted heat sink is positioned in thermal contact with the sides of the package which package is mounted on a substrate. The heat sink transfers heat from the heat sink to its ambient environment by radiation and convection to maintain the temperature within the package substantially constant.

Abstract: An isolation amplifier circuit is described that utilizes a magnetic field in combination with a Hall effect device to isolate input signals and output signals. The input signal is applied to a conducting coil that produces a magnetic field in a Hall effect material through which current is flowing. Because of the Hall effect, terminals on the sides of the Hall effect material can provide a voltage difference. This voltage difference is amplified and applied to a second conducting coil. The second conducting coil is adapted to provide a magnetic field in the opposite direction from the magnetic field produced by the input signal. When the magnetic fields are identical, no difference in current flowing through the two terminals will be present. The output signal of the difference amplifier circuit will be a function of the input signal. According to a second embodiment, apparatus is included for cancelling ambient magnetic fields.

Abstract: A system for hermetically sealing a thermoplastic tube during each cycle of operation of the system. A hand-holdable sealing gun has a pair of electrodes between which a tube to be sealed is placed. One of the electrodes is fixed and the other is moved by the core of a solenoid on which the moveable electrode is mounted. An RF field is established between the two electrodes to heat the tube between them. A limit switch is closed to terminate the RF field when the distance between the electrodes reaches a predetermined minimum distance. A trigger switch on the gun when squeezed initiates a cycle of operation of the system. A power supply, a source of RF energy, a mode switch and a second trigger switch are mounted in or on a housing. A bracket is also mounted on the housing for the sealing gun. The bracket positions the gun so that it can be operated in a fixed position.