Patents by Inventor Roger C. Griesmer

Roger C. Griesmer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit with programmable fuse array
    Patent number: 6876594
    Abstract: An integrated circuit (IC). The integrated circuit comprises an array (14) of data cells arranged in a plurality of rows and a plurality of columns. Each of the data cells comprises an electrically programmable fuse (40), and each electrically programmable fuse comprises a current path for providing a first digital state when the current path is left intact and for providing a second digital state when the current path is destroyed. Each row of the plurality of rows comprises at least one cell reserved for providing a protection indicator for the row, wherein the protection indicator is selected from a set consisting of read protection and write protection. The integrated circuit also comprises control circuitry (12) for selectively destroying the programmable fuse in selected ones of the data cells in a programmation mode. The integrated circuit also comprises control circuitry (12) for reading selected ones of the data cells in a read mode.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: April 5, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Roger C. Griesmer, Robert L. Pitts, Bryan D. Sheffield, Kun-His Li, Mark J. Jensen, Vinod J. Menezes
  • Integrated circuit with programmable fuse array
    Publication number: 20040129952
    Abstract: An integrated circuit (IC). The integrated circuit comprises an array (14) of data cells arranged in a plurality of rows and a plurality of columns. Each of the data cells comprises an electrically programmable fuse (40), and each electrically programmable fuse comprises a current path for providing a first digital state when the current path is left intact and for providing a second digital state when the current path is destroyed. Each row of the plurality of rows comprises at least one cell reserved for providing a protection indicator for the row, wherein the protection indicator is selected from a set consisting of read protection and write protection. The integrated circuit also comprises control circuitry (12) for selectively destroying the programmable fuse in selected ones of the data cells in a programmation mode. The integrated circuit also comprises control circuitry (12) for reading selected ones of the data cells in a read mode.
    Type: Application
    Filed: December 19, 2003
    Publication date: July 8, 2004
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Roger C. Griesmer, Robert L. Pitts, Bryan D. Sheffield, Kun-Hsi Li, Mark J. Jensen, Vinod J. Menezes