Patents by Inventor Roger F. W. Pease

Roger F. W. Pease has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5438204
    Abstract: A microelectronic substrate patterning system and method uses two or more copies of a mask pattern in the radiation path between the radiation source and the microelectronic substrate. The two or more copies are axially displaced from one another along the radiation path and are in axial alignment with each other along the radiation path. Thus, the mask pattern is imaged onto the microelectronic substrate as a result of interaction of the radiation with the multiple copies of the mask pattern in the radiation path. The mask pattern thereby images at an increased depth to focus compared to a single copy of the mask pattern. The two or more copies of the mask pattern may be used to increase the depth of focus of transmissive and reflective microelectronic substrate imaging systems. The mask copies may be identical or may be biased relative to the desired feature dimensions.
    Type: Grant
    Filed: December 30, 1993
    Date of Patent: August 1, 1995
    Assignee: The Board of Trustees of the Leland Stanford, Jr. University
    Inventors: Rudolf M. von Bunau, Roger F. W. Pease
  • Patent number: 4573067
    Abstract: A semiconductor chip having improved heat dissipation capability. The back surface of a semiconductor chip is provided with microscopic channels defined by fins in intimate contact with the chip. A cover is affixed to the fins to enclose the channels for the laminar flow of coolant fluid. The chip can be mounted in a recessed portion of a dual in-line package (DIP) with conductive tubes integral with the package providing the flow of coolant. Advantageously, the tubes can function as power busses to the integrated circuit.
    Type: Grant
    Filed: March 7, 1984
    Date of Patent: February 25, 1986
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: David B. Tuckerman, Roger F. W. Pease
  • Patent number: 4450472
    Abstract: A semiconductor chip having improved heat dissipation capability. The back surface of a semiconductor chip is provided with microscopic channels defined by fins in intimate contact with the chip. A cover is affixed to the fins to enclose the channels for the laminar flow of coolant fluid. The chip can be mounted in a recessed portion of a dual in-line package (DIP) with conductive tubes integral with the package providing the flow of coolant. Advantageously, the tubes can function as power busses to the integrated circuit.
    Type: Grant
    Filed: March 2, 1981
    Date of Patent: May 22, 1984
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: David B. Tuckerman, Roger F. W. Pease
  • Patent number: 4163155
    Abstract: By modifying the raster scanning mode of operation of an electron beam exposure system, it is practicable to directly define low-density features (100-102) in a relatively insensitive positive photoresist (10) that exhibits high resolution and good processing characteristics. As a result, it is feasible to utilize such a system as an adjunct in what is otherwise a photolithographic fabrication process to define certain critical features of a microminiature device.
    Type: Grant
    Filed: April 7, 1978
    Date of Patent: July 31, 1979
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: David S. Alles, Alfred U. Mac Rae, Roger F. W. Pease
  • Patent number: 4153843
    Abstract: In an improved electron beam exposure system (EBES), a demagnified image of an array (28) of illuminated apertures is focused and scanned over the surface of a resist-coated workpiece (12). A deflection unit (30) is associated with the array of apertures to provide an independent blanking capability for each of the electron beams propagated through the aperture array. Such an EBES can be operated in a faster mode than a conventional system. In addition, the electron dose delivered to each address position on the resist coating (10) can be thereby selectively controlled. Other forms of charge particles may also be used.
    Type: Grant
    Filed: August 9, 1978
    Date of Patent: May 8, 1979
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Roger F. W. Pease