Abstract: In accordance with a method of the present invention, a method of manufacturing a magnetic random access memory (MRAM) cell and a corresponding structure thereof are disclosed to include a multi-stage manufacturing process. The multi-stage manufacturing process includes performing a front end on-line (FEOL) stage to manufacture logic and non-magnetic portions of the memory cell by forming an intermediate interlayer dielectric (ILD) layer, forming intermediate metal pillars embedded in the intermediate ILD layer, depositing a conductive metal cap on top of the intermediate ILD layer and the metal pillars, performing magnetic fabrication stage to make a magnetic material portion of the memory cell being manufactured, and performing back end on-line (BEOL) stage to make metal and contacts of the memory cell being manufactured.

Abstract: One embodiment of the present invention includes multi-state current-switching magnetic memory element including a stack of two or more magnetic tunneling junctions (MTJs), each MTJ having a free layer and being separated from other MTJs in the stack by a seeding layer formed upon an isolation layer, the stack for storing more than one bit of information, wherein different levels of current applied to the memory element causes switching to different states.

Abstract: An embodiment of the present invention includes a multi-state current-switching magnetic memory element having a magnetic tunneling junction (MTJ), for storing more than one bit of information. The MTJ includes a fixed layer, a barrier layer, and a non-uniform free layer. In one embodiment, having 2 bits per cell, when one of four different levels of current is applied to the memory element, the applied current causes the non-uniform free layer of the MTJ to switch to one of four different magnetic states. The broad switching current distribution of the MTJ is a result of the broad grain size distribution of the non-uniform free layer.

Abstract: One embodiment of the present invention includes a non-volatile magnetic memory element including layers any of which are graded.

Abstract: One embodiment of the present invention includes a non-volatile magnetic memory element including a fixed layer, a barrier layer formed on top of the fixed layer, and a free layer formed on top of the barrier layer, wherein the electrical resistivity of the barrier layer is reduced by placing said barrier layer under compressive stress. Compressive stress is induced by either using a compressive stress inducing layer, or by using inert gases at low pressure during the sputtering process as the barrier layer is deposited, or by introducing compressive stress inducing molecules into the molecular lattice of the barrier layer.

Abstract: The signal-to-noise ratio of a magnetic recording medium having a thin magnetic layer is improved by adjusting the deposition conditions of the underlayer so that the magnetic layer is pseudo-epitaxially grown with a substantially uniform sub-micron-scale morphology. Uniform sub-micron-scale morphology can be attained by strategic selection of the underlayer and magnetic layer materials, and by controlling the underlayer deposition conditions so that the magnetic layer is epitaxially grown by a growth mechanism which is predominantly layer by layer. In an embodiment of the present invention, an underlayer comprising an alloy of chromium with vanadium, titanium or manganese, or an underlayer comprising a nickel-aluminum alloy, is sputter deposited at a pressure less than about 10 mTorr, substrate temperature greater than about 300.degree. C. and substrate bias greater than about 300 V, and a cobalt magnetic layer is epitaxially grown thereon, predominantly layer by layer.