Patents by Inventor Roger Mar

Roger Mar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Digital BIST test scheme for ADC/DAC circuits
    Patent number: 7271751
    Abstract: A generalized method for testing DACs (Digital to Analog Converters) and ADCs (Analog to Digital Converters), such as Sigma Delta (Successive Approximation), Pipeline or Flash ADCs. The DACs and ADCs are tested in pairs using a Digital Tester and on chip test circuitry. The DACs and ADCs may be tested at the highest clock frequency allowed in the specification, shortening test time. The test circuits required for this test scheme comprise cell logic two multiplexer cells and an internal Analog Test Bus. This scheme is extendable to the testing of many DACs and ADCs on the same IC. The number of DACs and ADCs need not be equal. Furthermore, the DACs may have more (or less) bits (addresses) than the ADCs. An ADC may be tested with more than one DAC or vice versa to determine which cell is at fault if a test fails.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: September 18, 2007
    Assignee: Toshiba America Electronic Components, Inc.
    Inventors: LuVerne Peterson, Jonathan A. Levi, Paul Abelovski, Roger Mar
  • DIGITAL BIST TEST SCHEME FOR ADC/DAC CIRCUITS
    Publication number: 20070182612
    Abstract: A generalized method for testing DACs (Digital to Analog Converters) and ADCs (Analog to Digital Converters), such as Sigma Delta (Successive Approximation), Pipeline or Flash ADCs. The DACs and ADCs are tested in pairs using a Digital Tester and on chip test circuitry. The DACs and ADCs may be tested at the highest clock frequency allowed in the specification, shortening test time. The test circuits required for this test scheme comprise cell logic two multiplexer cells and an internal Analog Test Bus. This scheme is extendable to the testing of many DACs and ADCs on the same IC. The number of DACs and ADCs need not be equal. Furthermore, the DACs may have more (or less) bits (addresses) than the ADCs. An ADC may be tested with more than one DAC or vice versa to determine which cell is at fault if a test fails.
    Type: Application
    Filed: February 8, 2006
    Publication date: August 9, 2007
    Inventors: LuVerne Peterson, Jonathan Levi, Paul Abelovski, Roger Mar