Patents by Inventor Roger Petigny

Roger Petigny has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11867563
    Abstract: A device of integration of an electric current received on an integration node, includes an operational amplifier, an integration capacitor, and a circuit for modifying an output voltage of the operational amplifier formed by a charge transfer circuit configured to be connected on the integration node and to transfer charges into the integration capacitor. The device also includes a comparison circuit configured to trigger the modification circuit at least once during the integration duration, and a storage circuit configured to store the number of triggerings which have occurred during the integration duration. The received electric current is calculated according to the output voltage as well as to the number of triggerings multiplied by the modification of the output voltage induced by the modification circuit.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: January 9, 2024
    Assignee: LYNRED
    Inventors: Roger Petigny, Patrick Robert
  • Publication number: 20210072087
    Abstract: A device of integration of an electric current received on an integration node, includes an operational amplifier, an integration capacitor, and a circuit for modifying an output voltage of the operational amplifier formed by a charge transfer circuit configured to be connected on the integration node and to transfer charges into the integration capacitor. The device also includes a comparison circuit configured to trigger the modification circuit at least once during the integration duration, and a storage circuit configured to store the number of triggerings which have occurred during the integration duration. The received electric current is calculated according to the output voltage as well as to the number of triggerings multiplied by the modification of the output voltage induced by the modification circuit.
    Type: Application
    Filed: February 27, 2019
    Publication date: March 11, 2021
    Inventors: Roger Petigny, Patrick Robert
  • Patent number: 8730072
    Abstract: The present disclosure includes calibration circuitry for adjusting the bandwidth of at least one sub-converter of an interleaved analog to digital converter (ADC), the at least one sub-converter having an input switch coupled to an input line of the ADC, the calibration circuitry having a control circuit adapted to adjust a bulk voltage of a transistor forming the input switch.
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: May 20, 2014
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Roger Petigny, Hugo Gicquel, Fabien Reaute
  • Patent number: 8487793
    Abstract: Device for processing an analogue signal, comprising an analogue-digital converter with a pipelined architecture having an offset, and compensation means configured to compensate for the said offset, the said compensation means comprising digital correction means configured to correct the integer portion of the offset based on the digital signal delivered by the analogue-digital converter, and analogue correction means included in the last stage of the analogue-digital converter and configured to correct the decimal portion of the offset.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: July 16, 2013
    Assignee: STMicroelectronics SA
    Inventors: Roger Petigny, Hugo Gicquel, Sophie Minot
  • Publication number: 20120098684
    Abstract: Device for processing an analogue signal, comprising an analogue-digital converter with a pipelined architecture having an offset, and compensation means configured to compensate for the said offset, the said compensation means comprising digital correction means configured to correct the integer portion of the offset based on the digital signal delivered by the analogue-digital converter, and analogue correction means included in the last stage of the analogue-digital converter and configured to correct the decimal portion of the offset.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 26, 2012
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics SA
    Inventors: Roger Petigny, Hugo Gicquel, Sophie Minot
  • Patent number: 7557650
    Abstract: A generator capable of supplying one or more output signals with a modulated cyclic ratio includes one or more formatting circuits each processing one input signal and one or more class D amplifiers powered with a power supply voltage and being driven by a corresponding one of the formatting circuits. Each formatting circuit has a counter-reaction loop and uses a reference voltage for which the average value is equal to half the power supply voltage. The corresponding output signal is thus corrected for any variations in the power supply voltage.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: July 7, 2009
    Assignee: STMicroelectronics S.A.
    Inventors: Olivier Giraud, Roger Petigny, Philippe Marguery
  • Publication number: 20070262815
    Abstract: A generator capable of supplying one or more output signals with a modulated cyclic ratio includes one or more formatting circuits each processing one input signal and one or more class D amplifiers powered with a power supply voltage and being driven by a corresponding one of the formatting circuits. Each formatting circuit has a counter-reaction loop and uses a reference voltage for which the average value is equal to half the power supply voltage. The corresponding output signal is thus corrected for any variations in the power supply voltage.
    Type: Application
    Filed: March 9, 2007
    Publication date: November 15, 2007
    Applicant: STMicroelectronics S.A.
    Inventors: Olivier Giraud, Roger Petigny, Philippe Marguery