Patents by Inventor Roi Sherman

Roi Sherman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11403173
    Abstract: A memory device includes content banks configured to store content data and parity banks configured to store parity data for reconstructing the content data. In response to receiving, in a first clock cycle, a first request requesting a first operation to be performed in a first content bank and a second request requesting to write new content data to the first content bank, the memory device performs the first operation in the first content bank, and writes the new content data to a second content bank. The second content bank is selected from a subset of content banks defined by content banks that correspond with parity banks different from parity banks that correspond with the first content bank. The memory device updates, based on the new content data written to the second content bank, parity data in the parity banks that correspond with the second content bank.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: August 2, 2022
    Assignee: Marvell Israel (M.I.S.L) Ltd.
    Inventors: Roi Sherman, Dror Bromberg
  • Patent number: 11099746
    Abstract: A method for data storage includes, in a network element, receiving from packet-processing circuitry at least a read command and a write command, for execution in a memory array that includes multiple single-port memory banks. When the read command and the write command are to access different memory banks in the memory array, the read command and the write command are executed for the packet-processing circuitry in the different memory banks in a same memory-access cycle. When the read command and the write command are both to access a first memory bank, a second memory bank of the memory array is selected. The read command is executed in the first memory bank and the write command is executed in the second memory bank, in the same memory-access cycle.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: August 24, 2021
    Assignee: MARVELL ISRAEL (M.I.S.L) LTD.
    Inventors: Dror Bromberg, Roi Sherman
  • Patent number: 10387322
    Abstract: A memory supports a write or multiple read operations in any given clock cycle. In a first clock cycle, new content data is written to a particular content memory bank among a set of content memory banks. Also in the first clock cycle, current content data is read from corresponding locations in one or more other content memory banks among the set of content memory banks. New parity data is generated based on the new content data written to the particular content memory bank and the current content data read from the one or more other content memory banks. The new parity data is written to a cache memory associated with the one or more parity banks. In a second clock cycle subsequent to the first clock cycle, the new parity data is transferred from the cache memory to one of the one or more parity memory banks.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: August 20, 2019
    Assignee: Marvell Israel (M.I.S.L.) Ltd.
    Inventors: Dror Bromberg, Roi Sherman, Rami Zemach
  • Patent number: 10146434
    Abstract: A First-In-First-Out (FIFO) system and a method for providing access to a memory shared by a plurality of N clients are provided. The memory has a single memory space for holding a plurality of data storage arrays that are respectively configured to store data in a first-in-first-out manner for corresponding clients among the N clients. An arbiter is configured to receive memory access requests from two or more of the N clients to perform a FIFO operation, to push data into a corresponding storage array or to pop data from the corresponding storage array in response to the memory access request. The arbiter is configured to select a first at least one of the clients to perform a first FIFO operation in a first memory operation cycle and to select a second at least one of the clients to perform a second FIFO operation in a second memory operation cycle.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: December 4, 2018
    Assignee: Marvell Israel (M.I.S.L) Ltd
    Inventors: Dror Bromberg, Roi Sherman
  • Patent number: 10089018
    Abstract: A method for data storage includes receiving one or more read commands and one or more write commands, for execution in a same clock cycle in a memory array that comprises multiple single-port memory banks divided into groups. The write commands provide data for storage but do not specify storage locations in which the data is to be stored. One or more of the groups, which are not accessed by the read commands in the same clock cycle, are selected. Available storage locations are chosen for the write commands in the single-port memory banks of the selected one or more groups. During the same clock cycle, the data provided in the write commands is stored in the chosen storage locations, and the data requested by the read commands is retrieved. Execution of the write commands is acknowledged by reporting the chosen storage locations.
    Type: Grant
    Filed: April 17, 2016
    Date of Patent: October 2, 2018
    Assignee: Marvell Israel (M.I.S.L) Ltd.
    Inventors: Dror Bromberg, Roi Sherman, Rami Zemach
  • Patent number: 9870319
    Abstract: Data items to be stored in a queue are received, where the queue is distributed among a plurality of memory banks. The data items are distributed among the plurality of memory banks, including selecting memory banks in which to store the data items based on pseudorandom numbers generated for the data items, where the pseudorandom numbers are generated using a first pseudorandom number generator initialized with a first seed. Subsequently the data items are retrieved from the plurality of memory banks, including selecting memory banks from which to retrieve the data items based on the pseudorandom numbers regenerated for the data items, where the pseudorandom numbers are regenerated using a second pseudorandom number generator initialized with the first seed.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: January 16, 2018
    Assignee: Marvell Israel (M.I.S.L) Ltd.
    Inventors: Sharon Ulman, Roi Sherman, Dror Bromberg, Carmi Arad
  • Publication number: 20170364408
    Abstract: A memory device includes content banks configured to store content data and parity banks configured to store parity data for reconstructing the content data. In response to receiving, in a first clock cycle, a first request requesting a first operation to be performed in a first content bank and a second request requesting to write new content data to the first content bank, the memory device performs the first operation in the first content bank, and writes the new content data to a second content bank. The second content bank is selected from a subset of content banks defined by content banks that correspond with parity banks different from parity banks that correspond with the first content bank. The memory device updates, based on the new content data written to the second content bank, parity data in the parity banks that correspond with the second content bank.
    Type: Application
    Filed: August 31, 2017
    Publication date: December 21, 2017
    Inventors: Roi SHERMAN, Dror BROMBERG
  • Publication number: 20160328158
    Abstract: A method for data storage includes receiving one or more read commands and one or more write commands, for execution in a same clock cycle in a memory array that comprises multiple single-port memory banks divided into groups. The write commands provide data for storage but do not specify storage locations in which the data is to be stored. One or more of the groups, which are not accessed by the read commands in the same clock cycle, are selected. Available storage locations are chosen for the write commands in the single-port memory banks of the selected one or more groups. During the same clock cycle, the data provided in the write commands is stored in the chosen storage locations, and the data requested by the read commands is retrieved. Execution of the write commands is acknowledged by reporting the chosen storage locations.
    Type: Application
    Filed: April 17, 2016
    Publication date: November 10, 2016
    Inventors: Dror Bromberg, Roi Sherman, Rami Zemach
  • Publication number: 20160321184
    Abstract: A memory supports a write or multiple read operations in any given clock cycle. In a first clock cycle, new content data is written to a particular content memory bank among a set of content memory banks. Also in the first clock cycle, current content data is read from corresponding locations in one or more other content memory banks among the set of content memory banks. New parity data is generated based on the new content data written to the particular content memory bank and the current content data read from the one or more other content memory banks. The new parity data is written to a cache memory associated with the one or more parity banks. In a second clock cycle subsequent to the first clock cycle, the new parity data is transferred from the cache memory to one of the one or more parity memory banks.
    Type: Application
    Filed: April 29, 2016
    Publication date: November 3, 2016
    Inventors: Dror BROMBERG, Roi SHERMAN, Rami ZEMACH
  • Publication number: 20160320989
    Abstract: A method for data storage includes, in a network element, receiving from packet-processing circuitry at least a read command and a write command, for execution in a memory array that includes multiple single-port memory banks. When the read command and the write command are to access different memory banks in the memory array, the read command and the write command are executed for the packet-processing circuitry in the different memory banks in a same memory-access cycle. When the read command and the write command are both to access a first memory bank, a second memory bank of the memory array is selected. The read command is executed in the first memory bank and the write command is executed in the second memory bank, in the same memory-access cycle.
    Type: Application
    Filed: April 7, 2016
    Publication date: November 3, 2016
    Inventors: Dror Bromberg, Roi Sherman
  • Patent number: 9485326
    Abstract: A method includes receiving a plurality of requests, determining a plurality of first bank identifiers specifying respective physical memory banks, and selecting, based at least on the first bank identifiers, a first set of requests to be processed according to a scheduling hierarchy. Selecting the first set of requests includes prohibiting any two requests from being associated with a same first bank identifier. The method also includes processing, during a single processing cycle, ones of the first set of requests at respective nodes within a single level of the scheduling hierarchy. The method also includes, responsively at least to processing ones of the first set of requests at respective nodes within the single level of the scheduling hierarchy, selecting a queue, and, responsively at least to selecting the queue, causing one or more packets corresponding to a traffic class associated with the queue to be sent to an egress port.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: November 1, 2016
    Assignee: Marvell Israel (M.I.S.L) Ltd.
    Inventors: Sharon Ulman, Roi Sherman, Dror Bromberg, Carmi Arad
  • Patent number: 9306876
    Abstract: In a method of managing queues in an egress queuing system in a network device, a plurality of packets to be stored in a first egress queue are received. The first egress queue is distributed among a plurality of memory banks. The packets are distributed among the plurality of memory banks. Memory banks in which to store the packets are selected based on pseudorandom numbers generated for the packets. The pseudorandom numbers are generated using a first pseudorandom number generator initialized with a first seed. Subsequently, the packets are retrieved from the plurality of memory banks. Memory banks from which to retrieve the packets are selected based on pseudorandom numbers regenerated for the packets. The pseudorandom numbers are regenerated using a second pseudorandom number generator initialized with the first seed.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: April 5, 2016
    Assignee: MARVELL ISRAEL (M.I.S.L) LTD.
    Inventors: Sharon Ulman, Roi Sherman, Dror Bromberg, Carmi Arad