Patents by Inventor Roland Awusie

Roland Awusie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Transistors, semiconductor constructions, and methods of forming semiconductor constructions
    Patent number: 11424256
    Abstract: Some embodiments include a transistor having a first electrically conductive gate portion along a first segment of a channel region and a second electrically conductive gate portion along a second segment of the channel region. The second electrically conductive gate portion is a different composition than the first electrically conductive gate portion. Some embodiments include a method of forming a semiconductor construction. First semiconductor material and metal-containing material are formed over a NAND string. An opening is formed through the metal-containing material and the first semiconductor material, and is lined with gate dielectric. Second semiconductor material is provided within the opening to form a channel region of a transistor. The transistor is a select device electrically coupled to the NAND string.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: August 23, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Deepak Thimmegowda, Andrew R. Bicksler, Roland Awusie
  • Transistors, Semiconductor Constructions, and Methods of Forming Semiconductor Constructions
    Publication number: 20200058662
    Abstract: Some embodiments include a transistor having a first electrically conductive gate portion along a first segment of a channel region and a second electrically conductive gate portion along a second segment of the channel region. The second electrically conductive gate portion is a different composition than the first electrically conductive gate portion. Some embodiments include a method of forming a semiconductor construction. First semiconductor material and metal-containing material are formed over a NAND string. An opening is formed through the metal-containing material and the first semiconductor material, and is lined with gate dielectric. Second semiconductor material is provided within the opening to form a channel region of a transistor. The transistor is a select device electrically coupled to the NAND string.
    Type: Application
    Filed: October 24, 2019
    Publication date: February 20, 2020
    Applicant: Micron Technology, Inc.
    Inventors: Deepak Thimmegowda, Andrew R. Bicksler, Roland Awusie
  • Semiconductor constructions which include metal-containing gate portions and semiconductor-containing gate portions
    Patent number: 10497707
    Abstract: Some embodiments include a transistor having a first electrically conductive gate portion along a first segment of a channel region and a second electrically conductive gate portion along a second segment of the channel region. The second electrically conductive gate portion is a different composition than the first electrically conductive gate portion. Some embodiments include a method of forming a semiconductor construction. First semiconductor material and metal-containing material are formed over a NAND string. An opening is formed through the metal-containing material and the first semiconductor material, and is lined with gate dielectric. Second semiconductor material is provided within the opening to form a channel region of a transistor. The transistor is a select device electrically coupled to the NAND string.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: December 3, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Deepak Thimmegowda, Andrew R. Bicksler, Roland Awusie
  • Transistors, Semiconductor Constructions, and Methods of Forming Semiconductor Constructions
    Publication number: 20170162589
    Abstract: Some embodiments include a transistor having a first electrically conductive gate portion along a first segment of a channel region and a second electrically conductive gate portion along a second segment of the channel region. The second electrically conductive gate portion is a different composition than the first electrically conductive gate portion. Some embodiments include a method of forming a semiconductor construction. First semiconductor material and metal-containing material are formed over a NAND string. An opening is formed through the metal-containing material and the first semiconductor material, and is lined with gate dielectric. Second semiconductor material is provided within the opening to form a channel region of a transistor. The transistor is a select device electrically coupled to the NAND string.
    Type: Application
    Filed: February 22, 2017
    Publication date: June 8, 2017
    Inventors: Deepak Thimmegowda, Andrew R. Bicksler, Roland Awusie
  • Methods of forming semiconductor constructions
    Patent number: 9613978
    Abstract: Some embodiments include a transistor having a first electrically conductive gate portion along a first segment of a channel region and a second electrically conductive gate portion along a second segment of the channel region. The second electrically conductive gate portion is a different composition than the first electrically conductive gate portion. Some embodiments include a method of forming a semiconductor construction. First semiconductor material and metal-containing material are formed over a NAND string. An opening is formed through the metal-containing material and the first semiconductor material, and is lined with gate dielectric. Second semiconductor material is provided within the opening to form a channel region of a transistor. The transistor is a select device electrically coupled to the NAND string.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: April 4, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Deepak Thimmegowda, Andrew R. Bicksler, Roland Awusie
  • Transistors, Semiconductor Constructions, and Methods of Forming Semiconductor Constructions
    Publication number: 20160079274
    Abstract: Some embodiments include a transistor having a first electrically conductive gate portion along a first segment of a channel region and a second electrically conductive gate portion along a second segment of the channel region. The second electrically conductive gate portion is a different composition than the first electrically conductive gate portion. Some embodiments include a method of forming a semiconductor construction. First semiconductor material and metal-containing material are formed over a NAND string. An opening is formed through the metal-containing material and the first semiconductor material, and is lined with gate dielectric. Second semiconductor material is provided within the opening to form a channel region of a transistor. The transistor is a select device electrically coupled to the NAND string.
    Type: Application
    Filed: November 23, 2015
    Publication date: March 17, 2016
    Inventors: Deepak Thimmegowda, Andrew R. Bicksler, Roland Awusie
  • Transistors, semiconductor constructions, and methods of forming semiconductor constructions
    Patent number: 9219132
    Abstract: Some embodiments include a transistor having a first electrically conductive gate portion along a first segment of a channel region and a second electrically conductive gate portion along a second segment of the channel region. The second electrically conductive gate portion is a different composition than the first electrically conductive gate portion. Some embodiments include a method of forming a semiconductor construction. First semiconductor material and metal-containing material are formed over a NAND string. An opening is formed through the metal-containing material and the first semiconductor material, and is lined with gate dielectric. Second semiconductor material is provided within the opening to form a channel region of a transistor. The transistor is a select device electrically coupled to the NAND string.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: December 22, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Deepak Thimmegowda, Andrew R. Bicksler, Roland Awusie
  • Transistors, Semiconductor Constructions, and Methods of Forming Semiconductor Constructions
    Publication number: 20150044834
    Abstract: Some embodiments include a transistor having a first electrically conductive gate portion along a first segment of a channel region and a second electrically conductive gate portion along a second segment of the channel region. The second electrically conductive gate portion is a different composition than the first electrically conductive gate portion. Some embodiments include a method of forming a semiconductor construction. First semiconductor material and metal-containing material are formed over a NAND string. An opening is formed through the metal-containing material and the first semiconductor material, and is lined with gate dielectric. Second semiconductor material is provided within the opening to form a channel region of a transistor. The transistor is a select device electrically coupled to the NAND string.
    Type: Application
    Filed: September 19, 2014
    Publication date: February 12, 2015
    Inventors: Deepak Thimmegowda, Andrew R. Bicksler, Roland Awusie
  • Transistors and semiconductor constructions
    Patent number: 8853769
    Abstract: Some embodiments include a transistor having a first electrically conductive gate portion along a first segment of a channel region and a second electrically conductive gate portion along a second segment of the channel region. The second electrically conductive gate portion is a different composition than the first electrically conductive gate portion. Some embodiments include a method of forming a semiconductor construction. First semiconductor material and metal-containing material are formed over a NAND string. An opening is formed through the metal-containing material and the first semiconductor material, and is lined with gate dielectric. Second semiconductor material is provided within the opening to form a channel region of a transistor. The transistor is a select device electrically coupled to the NAND string.
    Type: Grant
    Filed: January 10, 2013
    Date of Patent: October 7, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Deepak Thimmegowda, Andrew R. Bicksler, Roland Awusie
  • Transistors, Semiconductor Constructions, and Methods of Forming Semiconductor Constructions
    Publication number: 20140191340
    Abstract: Some embodiments include a transistor having a first electrically conductive gate portion along a first segment of a channel region and a second electrically conductive gate portion along a second segment of the channel region. The second electrically conductive gate portion is a different composition than the first electrically conductive gate portion. Some embodiments include a method of forming a semiconductor construction. First semiconductor material and metal-containing material are formed over a NAND string. An opening is formed through the metal-containing material and the first semiconductor material, and is lined with gate dielectric. Second semiconductor material is provided within the opening to form a channel region of a transistor. The transistor is a select device electrically coupled to the NAND string.
    Type: Application
    Filed: January 10, 2013
    Publication date: July 10, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Deepak Thimmegowda, Andrew R. Bicksler, Roland Awusie