Abstract: A distributed power amplifier includes radio frequency (RF) input and output terminals. A first field effect transistor (FET) is coupled at a first gate terminal to the RF input terminal and at a first drain terminal to the RF output terminal. The first FET has a first periphery and a first source terminal electrically connected to ground potential. A second FET has a second periphery smaller than the first periphery. The second FET has a second gate terminal electrically coupled to the first gate terminal through a first inductor, a second drain terminal electrically coupled to the first drain terminal through a second inductor, and a second source terminal electrically connected to the ground potential. A drain voltage terminal, which excludes a resistive element, is electrically coupled to a drain bias network through which a drain bias voltage is applied to the first drain terminal and the second drain terminal.

Abstract: A distributed power amplifier includes radio frequency (RF) input and output terminals. A first field effect transistor (FET) is coupled at a first gate terminal to the RF input terminal and at a first drain terminal to the RF output terminal. The first FET has a first periphery and a first source terminal electrically connected to ground potential. A second FET has a second periphery smaller than the first periphery. The second FET has a second gate terminal electrically coupled to the first gate terminal through a first inductor, a second drain terminal electrically coupled to the first drain terminal through a second inductor, and a second source terminal electrically connected to the ground potential. A drain voltage terminal, which excludes a resistive element, is electrically coupled to a drain bias network through which a drain bias voltage is applied to the first drain terminal and the second drain terminal.

Abstract: A distributed power amplifier includes radio frequency (RF) input and output terminals. A first field effect transistor (FET) is coupled at a first gate terminal to the RF input terminal and at a first drain terminal to the RF output terminal. The first FET has a first periphery and a first source terminal electrically connected to ground potential. A second FET has a second periphery smaller than the first periphery. The second FET has a second gate terminal electrically coupled to the first gate terminal through a first inductor, a second drain terminal electrically coupled to the first drain terminal through a second inductor, and a second source terminal electrically connected to the ground potential. A drain voltage terminal, which excludes a resistive element, is electrically coupled to a drain bias network through which a drain bias voltage is applied to the first drain terminal and the second drain terminal.

Abstract: A distributed power amplifier includes radio frequency (RF) input and output terminals. A first field effect transistor (FET) is coupled at a first gate terminal to the RF input terminal and at a first drain terminal to the RF output terminal. The first FET has a first periphery and a first source terminal electrically connected to ground potential. A second FET has a second periphery smaller than the first periphery. The second FET has a second gate terminal electrically coupled to the first gate terminal through a first inductor, a second drain terminal electrically coupled to the first drain terminal through a second inductor, and a second source terminal electrically connected to the ground potential. A drain voltage terminal, which excludes a resistive element, is electrically coupled to a drain bias network through which a drain bias voltage is applied to the first drain terminal and the second drain terminal.

Abstract: A gate pulsing gate ladder circuit includes a series connected resistor ladder with bond pads connected to the resistor ladder between adjacent resistors. An electrical node is positioned between a first and second resistor of the resistor ladder. The electrical node is electrically connected to a gate electrode of a field effect transistor (FET). A power supply produces a constant power voltage that is applied to a pre-selected bond pad to produce a desired bias voltage at the gate electrode of the FET. A selectable gate enable voltage source is connected to an and of the resistor ladder at the first resistor and is configured to produce a first and second voltage level that when combined with the constant power voltage produces a voltage level that causes the FET to be in a conducting state or non-conducting state, respectively.

Abstract: A gate pulsing gate ladder circuit includes a series connected resistor ladder with bond pads connected to the resistor ladder between adjacent resistors. An electrical node is positioned between a first and second resistor of the resistor ladder. The electrical node is electrically connected to a gate electrode of a field effect transistor (FET). A power supply produces a constant power voltage that is applied to a pre-selected bond pad to produce a desired bias voltage at the gate electrode of the FET. A selectable gate enable voltage source is connected to an and of the resistor ladder at the first resistor and is configured to produce a first and second voltage level that when combined with the constant power voltage produces a voltage level that causes the FET to be in a conducting state or non-conducting state, respectively.

Abstract: A frequency divider circuit includes a master-slave flip-flop having a master flip-flop and a slave flip-flop. The slave flip-flop is connected to the master flip-flop. The master flip-flop includes a first plurality of logic gates and is configured to receive a first clock signal. The slave flip-flop includes a second plurality of logic gates and is configured to receive a second clock signal. The second plurality of logic gates is implemented using single-ended diode-transistor logic (DTL).

Abstract: A system includes a source of electromagnetic energy or power and an amplitude-sensitive circuit. An amplitude-limiting transmission line couples the source to the circuit. The transmission line includes a semiconductor in the field of the transmission line and a light source for illuminating the semiconductor with light responsive to the amplitude from the source. Application of energy or power to the light source illuminates the semiconductor, which produces a plasma. The plasma tends to attenuate the energy or power reaching the circuit.

Abstract: An RF phase shifter includes the cascade of active and passive RF phase shift bits, having different phase increments. The active phase shift bit includes a FET with source and drain. First and second RF single-pole, double throw switches have their common elements coupled to the source and drain, respectively, for selectively connecting one of the in-phase source signals and out-of-phase drain signals to a third switch, and for coupling the non-selected signal to a reference. The third switch outputs the available signal. Additional phase increments may be included to achieve phase shifts or differences other than 180°.

Abstract: A low profile antenna includes an antenna and a ground plane structure operatively associated with the antenna. The ground plane structure has a generally planar surface, at least one protrusion extending from the planar surface and a dielectric substrate supported by the planar surface. The dielectric substrate includes a relative permeability (?) of greater than or equal to about one and a relative permittivity (?) of greater than or equal to about one.

Abstract: An antenna structure for solid-state fabrication includes a ground plane comprising a stack of a plurality of planar conductors, each having its broad surfaces adjacent to, but insulated from, adjacent planar conductors. At least one edge of each conductor of the stack is registered with like edges of other conductors to define a discontinuous surface. A radiating element is spaced from the surface. Through vias extend between the conductors of the stack to form a conductive matrix. A feed for the radiating element extends toward, but does not contact, the matrix.

Abstract: A Doppler radar speed measuring module, that is self-contained and handheld, is fabricated on a multilayer PCB (printed circuit board) containing at least one antenna array and electronic circuitry. In one embodiment the antenna array is located on a top side and electronic circuitry is located on a bottom side opposite the antenna, with a ground plane layer sandwiched between the antenna array and the circuitry. The electronic circuitry includes a dielectric resonator stabilized oscillator, a microwave amplifier, a microwave mixer, a microwave coupler, voltage regulators, mechanical switches, and a display to indicate the measured speed of a moving target. The oscillator generates a very stable microwave signal which is split with part of the signal fed to a mixer and part fed to a transmit antenna. In one embodiment plated through vias electrically connect the two sides together. A transmitted signal reflects off of a moving target and is received by a receive antenna.

Abstract: A high-temperature superconductor (HT.sub.c S) in a microstrip configurat which is electrically related to a superconducting coupler and which is controlled by a heater disposed over the superconducting microstrip line. This limiter configuration is used in a series configuration with other circuitry and utilizes the low loss characteristics of the HT.sub.c S material and the wide bandwidth characteristics of microstrip. The structure itself is a five layer microstrip geometry which includes a normal metal ground plane; a dielectric substrate disposed on the metal ground plane; a superconducting microstrip transmission disposed on the substrate; a dielectric film layer disposed on the superconducting microstrip; and a heating element disposed on the dielectric film layer and over the superconducting microstrip.

Abstract: A dual-gate self-oscillating mixer FET that is injection-locked from a remote LO frequency source. The dual-gate FET having a feedback circuit connected between the first gate port and the drain port that is tuned so that the FET can oscillate within a frequency range including a predetermined LO frequency. The FET having a remote synchronization circuit electrically connected to the FET first gate port to inject the predetermined LO frequency therein and lock the FET oscillation to that LO. Accordingly, the dual-gate FET mixes RF energy input to the second gate port with the locked LO injected in the first gate port and outputs the desired intermediate frequency through the drain port.

Abstract: The present invention is a superconducting flux flow mixer which has two control lines. Preferably, the mixer comprises a grounded superconducting signal line wherein portions of the superconducting signal line are etched away to form superconducting weak links within the superconducting signal line, a local oscillator and RF control line disposed on either side of the superconducting weak links, and a substrate upon which the control lines and superconducting signal line are disposed. When cooled to a temperature close to the critical temperature of the superconducting weak links, the resistance of the weak links can be manipulated by a magnetic field created by current flowing through the local oscillator and RF control lines. By using two control lines, better control of frequency is attained while at the same time providing better stability and a decrease in size of prior art mixers.

Abstract: A directional coupler is formed with adjacent edges of its microstrips following curved paths having reversals in curvature such as a series of sine waves or half circles.

Abstract: A magnetic flux-enhanced control line for a superconducting flux flow transistor (SFFT). The SFFT includes a pair of superconducting electrodes which provide a voltage output, a region of weakened superconductor connecting the electrodes and a control line. The region of weakened superconductor carries a current I.sub.body and the control line carries a current I.sub.Control. The control line further has a portion thereof proximate the weakened region for providing a localized magnetic field through the weakened region as a function of I.sub.Control. The magnetic flux through the weakened region induces vortices therein which have a resistance r.sub.o. The proximate portion of the control line forms a tortuous current path whereby the magnetic flux through the weakened region is increased for increasing r.sub.o so that the output voltage of the transistor is increased without increasing I.sub.Control.

Abstract: A remote temperature sensor includes a microwave oscillator which generates n output signal having a frequency which is proportional to the temperature of the environment in which it is located. The oscillator includes a relatively high transition temperature superconducting (HTSC) ring coupled to a transistor in a plurality of microstrip line oscillator configurations including those of a reaction oscillator, a transmission oscillator, a reflection oscillator and a parallel feedback oscillator. The superconducting ring operates below its transition temperature and in so doing, acts as a high Q resonator whose resonant frequency is proportional to temperature.

Abstract: An ambient condition sensor is embodied in an oscillator which generates an output signal having a frequency which is proportional to the ambient condition of the environment in which it is located. The oscillator includes a ring resonator consisting of a metallic ring located in the output plane of a grounded source gallium arsenide MESFET type transistor oscillator formed on a temperature sensitive dielectric substrate. The circumference of the ring is directly related to the ring resonator's resonant frequency. More particularly, the circumference of the ring is a multiple of the wavelength of the oscillator's output signal. Such a device permits unmanned, remote and inexpensive temperature sensing in places generally unsuited for operator presence.