Abstract: An instrument includes a probe providing a single signal path for conveying a signal from a circuit under test to the instrument. A receiver circuit within the instrument divides the path into an analog path and a digital path. The digital path includes a comparator for determining the logic state of the signal and producing a digital representation of the signal under test. The analog path includes a multiplexer to selectively couple one of a plurality of analog input signals to an output terminal for viewing on an oscilloscope. Preferably, the probe head includes a buffer amplifier to reduce loading on the circuit under test and to increase bandwidth of the signals conveyed along the test cable to the instrument. An electrically trimmable resistor is employed to terminate the transmission line of the test cable in its characteristic impedance in order to reduce reflections and maintain transmission bandwidth.

Abstract: An instrument includes a probe providing a single signal path for conveying a signal from a circuit under test to the instrument. A receiver circuit within the instrument divides the path into an analog path and a digital path. The digital path includes a comparator for determining the logic state of the signal and producing a digital representation of the signal under test. The analog path includes a multiplexer to selectively couple one of a plurality of analog input signals to an output terminal for viewing on an oscilloscope. Preferably, the probe head includes a buffer amplifier to reduce loading on the circuit under test and to increase bandwidth of the signals conveyed along the test cable to the instrument. An electrically trimmable resistor is employed to terminate the transmission line of the test cable in its characteristic impedance in order to reduce reflections and maintain transmission bandwidth.

Abstract: A differential attenuator is described that is capable of automatic calibration using electronically adjustable circuit elements. The differential attenuator has positive and negative inputs and outputs. A resistor and capacitor couple the positive side input and output, while a matching resistor and capacitor couple the negative side input and output. Shunt resistors and shunt capacitors coupled to the positive and negative outputs are augmented and made electronically adjustable by multipliers having their signal inputs coupled to the respective side output nodes. The outputs of one set of multipliers are coupled to the other ends of the shunt resistors, while their multiplication coefficients are controlled by a dc.sub.-- control signal. The outputs of another set of multipliers are capacitively coupled back to their respective side output nodes, while their multiplication coefficients are controlled by an ac.sub.-- control signal.

Abstract: A signal coupling circuit suitable for use in a high-speed signal acquisition probe comprises separate high-frequency and low-frequency signal transmission paths from input to output. The low-frequency path includes a mechanism for variably shifting the DC voltage level at the circuit input to offset quiescent or average voltage levels of an input signal. Values of impedance elements for both the high-frequency and low-frequency transmission paths may be selected to provide predetermined input and output impedances without compromising signal fidelity or limiting signal bandwidth.

Abstract: A signal processing system employing charge transfer devices for fast-in slow-out operation is disclosed. A push-pull input analog signal is applied to two charge transfer devices, and the clock pulses applied thereto are shifted one-half clock cycle with respect to one another. The output signals from the two charge transfer devices are differentially summed, and thereby providing cancellation of dark current and clock related noise in the charge transfer device, and doubled sample rate.

Abstract: A waveform acquisition apparatus and method permits a plurality of samples of an input signal to be taken for each trigger recognition event, and stored at predetermined memory addresses to provide a complete equivalent-time waveform in which all accumulated samples are in correct time relation to each other. The mathematical determination of each address is obtained by measuring the time difference between a trigger recognition event on each cycle of a repetitive signal and a next occurring sample clock following each trigger recognition event, and then using a microprocessor to compute the relative addresses.

Abstract: A waveform measurement and display apparatus comprises a pair of signal-processing channels in addition to a sweep generator arranged so as to provide both Y-T and X-Y display modes. A time marker generator system is provided to insert time markers into the same relative time positions of the respective Y-T and X-Y displays so as to precisely ascertain the time relationship between the two displays. Additionally, such time markers may be inserted into corresponding time positions for expanded and unexpanded waveforms in the Y-T display mode so as to precisely ascertain the relative time position therebetween.