Patents by Inventor Roland Koppert

Roland Koppert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8882565
    Abstract: A method of polishing a semiconductor wafer includes applying a polishing pad to the semiconductor wafer so as to subject the semiconductor wafer to a polishing process and supplying an aqueous polishing agent solution between the polishing pad and the semiconductor wafer. The polishing pad includes fixedly bonded abrasives of SiO2 with an average grain size in a range of 0.1 to 1.0 ?m. The aqueous polishing agent solution comprising an alkaline component, being free of solid materials and having a variable pH value in a range of 11 to 13.5. The aqueous polishing agent solution is maintained at a pH value of less than 13 during the polishing process and the pH value of the aqueous polishing agent solution is increased to a range of 13 to 13.5 so as to end the polishing process.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: November 11, 2014
    Assignee: Siltronic AG
    Inventors: Juergen Schwandner, Roland Koppert
  • Patent number: 8721390
    Abstract: A method for double-side polishing of a semiconductor wafer includes situating the semiconductor wafer in a cutout of a carrier that is disposed in a working gap between an upper polishing plate covered by a first polishing pad and a lower polishing plate covered by a second polishing pad. The first and second polishing pads each include tiled square segments that are formed by an arrangement of channels on the pads, where the square segments of the first pad are larger than the segments of the second pad. The square segments of the polishing pads include abrasives. During polishing, the carrier is guided such that a portion of the wafer temporarily projects laterally outside of the working gap. A polishing agent with a pH that is variable is supplied during polishing at a pH in a range of 11 to 12.5 during a first step and at a pH of at least 13 during a second step.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: May 13, 2014
    Assignee: Siltronic AG
    Inventors: Juergen Schwandner, Thomas Buschhardt, Roland Koppert
  • Patent number: 8647985
    Abstract: Semiconductor material substrates are polished by a method including at least one polishing step A by means of which the substrate is polished on a polishing pad containing an abrasive material bonded in the polishing pad and a polishing agent solution is introduced between the substrate and the polishing pad during the polishing step; and at least one polishing step B by means of which the substrate is polished on a polishing pad containing an abrasive material-containing polishing pad and wherein a polishing agent slurry containing unbonded abrasive material is introduced between the substrate and the polishing pad during the polishing step.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: February 11, 2014
    Assignee: Siltronic AG
    Inventors: Juergen Schwandner, Thomas Buschhardt, Roland Koppert, Georg Pietsch
  • Patent number: 8647173
    Abstract: A method of polishing a semiconductor wafer using a holding system including a lined cutout the size of the semiconductor wafer that is fixed to a carrier. The method includes holding the semiconductor wafer in the cutout through adhesion of a first side of the semiconductor wafer to a bearing surface in the cutout and polishing a second side of the held semiconductor wafer using a polishing pad that is fixed on a polishing plate while introducing a polishing agent between the second side of the semiconductor wafer and the polishing pad, the polishing pad including fixedly bonded abrasive materials. The carrier is guided during polishing such that a portion of the second side of the semiconductor wafer temporarily projects beyond a lateral edge of a surface of the polishing pad.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: February 11, 2014
    Assignee: Siltronic AG
    Inventors: Juergen Schwandner, Thomas Buschhardt, Roland Koppert
  • Patent number: 8551870
    Abstract: Epitaxially coated semiconductor wafers are produced by minimally the following steps in the order specified: (a) depositing an epitaxial layer on one side of a semiconductor wafer; (b) first polishing the epitaxially coated side of the semiconductor wafer with a polishing pad with fixed abrasive while supplying a polishing solution which is free of solids; (c) CMP polishing of the epitaxially coated side of the semiconductor wafer with a soft polishing pad which contains no fixed abrasive, while supplying a polishing agent suspension; (d) depositing another epitaxial layer on the previously epitaxially coated and polished side of the semiconductor wafer.
    Type: Grant
    Filed: June 10, 2010
    Date of Patent: October 8, 2013
    Assignee: Siltronic AG
    Inventors: Juergen Schwandner, Roland Koppert
  • Patent number: 8444455
    Abstract: A semiconductor wafer is polished, wherein in a first step, the rear side of the wafer is polished by a polishing pad comprising fixedly bonded abrasives having a grain size of 0.1-1.0 ?m, while supplying a polishing agent free of solid materials having a pH of at least 11.8, and, in a second step, the front side of the semiconductor wafer is polished, wherein a polishing agent having a pH of less than 11.8 is supplied. A polishing pad for use in apparatuses for polishing semiconductor wafers, has a layer containing abrasives, a layer composed of a stiff plastic and also a compliant, non-woven layer, wherein the layers are bonded to one another by means of pressure-sensitive adhesive layers.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: May 21, 2013
    Assignee: SILTRONIC AG
    Inventors: Juergen Schwandner, Roland Koppert
  • Patent number: 8338302
    Abstract: Semiconductor wafer provided with a strain-relaxed layer of Si1-xGex, are polished in a first step of mechanical machining of the Si1-xGex layer of the semiconductor wafer in a polishing machine using a polishing pad containing fixedly bonded abrasive materials having a particle size of 0.55 ?m or less, and also a second step of a chemomechanical machining of the previously mechanically machined Si1-xGex layer of the semiconductor wafer using a polishing pad and with supply of a polishing agent slurry containing abrasive materials.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: December 25, 2012
    Assignee: Siltronic AG
    Inventors: Juergen Schwandner, Roland Koppert
  • Publication number: 20110244760
    Abstract: A method of polishing a semiconductor wafer includes applying a polishing pad to the semiconductor wafer so as to subject the semiconductor wafer to a polishing process and supplying an aqueous polishing agent solution between the polishing pad and the semiconductor wafer. The polishing pad includes fixedly bonded abrasives of SiO2 with an average grain size in a range of 0.1 to 1.0 ?m. The aqueous polishing agent solution comprising an alkaline component, being free of solid materials and having a variable pH value in a range of 11 to 13.5. The aqueous polishing agent solution is maintained at a pH value of less than 13 during the polishing process and the pH value of the aqueous polishing agent solution is increased to a range of 13 to 13.5 so as to end the polishing process.
    Type: Application
    Filed: March 8, 2011
    Publication date: October 6, 2011
    Applicant: SILTRONIC AG
    Inventors: Juergen Schwandner, Roland Koppert
  • Publication number: 20110244762
    Abstract: A method for double-side polishing of a semiconductor wafer includes situating the semiconductor wafer in a cutout of a carrier that is disposed in a working gap between an upper polishing plate covered by a first polishing pad and a lower polishing plate covered by a second polishing pad. The first and second polishing pads each include tiled square segments that are formed by an arrangement of channels on the pads, where the square segments of the first pad are larger than the segments of the second pad. The square segments of the polishing pads include abrasives. During polishing, the carrier is guided such that a portion of the wafer temporarily projects laterally outside of the working gap. A polishing agent with a pH that is variable is supplied during polishing at a pH in a range of 11 to 12.5 during a first step and at a pH of at least 13 during a second step.
    Type: Application
    Filed: March 7, 2011
    Publication date: October 6, 2011
    Applicant: SILTRONIC AG
    Inventors: Juergen Schwandner, Thomas Buschhardt, Roland Koppert
  • Publication number: 20110097974
    Abstract: A method of polishing a semiconductor wafer using a holding system including a lined cutout the size of the semiconductor wafer that is fixed to a carrier. The method includes holding the semiconductor wafer in the cutout through adhesion of a first side of the semiconductor wafer to a bearing surface in the cutout and polishing a second side of the held semiconductor wafer using a polishing pad that is fixed on a polishing plate while introducing a polishing agent between the second side of the semiconductor wafer and the polishing pad, the polishing pad including fixedly bonded abrasive materials. The carrier is guided during polishing such that a portion of the second side of the semiconductor wafer temporarily projects beyond a lateral edge of a surface of the polishing pad.
    Type: Application
    Filed: October 4, 2010
    Publication date: April 28, 2011
    Applicant: Siltronic AG
    Inventors: Juergen SCHWANDNER, Thomas BUSCHHARDT, Roland KOPPERT
  • Publication number: 20100330786
    Abstract: Epitaxially coated semiconductor wafers are produced by minimally the following steps in the order specified: (a) depositing an epitaxial layer on one side of a semiconductor wafer; (b) first polishing the epitaxially coated side of the semiconductor wafer with a polishing pad with fixed abrasive while supplying a polishing solution which is free of solids; (c) CMP polishing of the epitaxially coated side of the semiconductor wafer with a soft polishing pad which contains no fixed abrasive, while supplying a polishing agent suspension; (d) depositing another epitaxial layer on the previously epitaxially coated and polished side of the semiconductor wafer.
    Type: Application
    Filed: June 10, 2010
    Publication date: December 30, 2010
    Applicant: SILTRONIC AG
    Inventors: Juergen Schwandner, Roland Koppert
  • Publication number: 20100330882
    Abstract: A semiconductor wafer is polished, wherein in a first step, the rear side of the wafer is polished by a polishing pad comprising fixedly bonded abrasives having a grain size of 0.1-1.0 ?m, while supplying a polishing agent free of solid materials having a pH of at least 11.8, and, in a second step, the front side of the semiconductor wafer is polished, wherein a polishing agent having a pH of less than 11.8 is supplied. A polishing pad for use in apparatuses for polishing semiconductor wafers, has a layer containing abrasives, a layer composed of a stiff plastic and also a compliant, non-woven layer, wherein the layers are bonded to one another by means of pressure-sensitive adhesive layers.
    Type: Application
    Filed: May 5, 2010
    Publication date: December 30, 2010
    Applicant: SILTRONIC AG
    Inventors: Juergen Schwandner, Roland Koppert
  • Publication number: 20100130012
    Abstract: Semiconductor wafer provided with a strain-relaxed layer of Si1-xGex, are polished in a first step of mechanical machining of the Si1-xGex layer of the semiconductor wafer in a polishing machine using a polishing pad containing fixedly bonded abrasive materials having a particle size of 0.55 ?m or less, and also a second step of a chemomechanical machining of the previously mechanically machined Si1-xGex layer of the semiconductor wafer using a polishing pad and with supply of a polishing agent slurry containing abrasive materials.
    Type: Application
    Filed: November 2, 2009
    Publication date: May 27, 2010
    Applicant: SILTRONIC AG
    Inventors: Juergen Schwandner, Roland Koppert
  • Publication number: 20090029552
    Abstract: Semiconductor material substrates are polished by a method including at least one polishing step A by means of which the substrate is polished on a polishing pad containing an abrasive material bonded in the polishing pad and a polishing agent solution is introduced between the substrate and the polishing pad during the polishing step; and at least one polishing step B by means of which the substrate is polished on a polishing pad containing an abrasive material-containing polishing pad and wherein a polishing agent slurry containing unbonded abrasive material is introduced between the substrate and the polishing pad during the polishing step.
    Type: Application
    Filed: July 2, 2008
    Publication date: January 29, 2009
    Applicant: SILTRONIC AG
    Inventors: Juergen Schwandner, Thomas Buschhardt, Roland Koppert, Georg Pietsch