Abstract: The present invention relates to a method of producing a contactless chip card. In a first step of the method, a card body with one or a plurality of recesses on one card body side is produced from a theremoplastic material, preferably by injection moulding. Bumps being formed on the base surface of the recesses. Subsequently, conductor tracks corresponding to a coil as a conductor track pattern are impressed directly onto surface areas of the card body side including the recesses using a hot impressing technique. The conductor tracks are impressed especially also onto surface areas inside the recesses such that same extends across the bumps. One or a plurality of chips are then aligned in the recesses and contacted with the conductor tracks in the recesses which extend across the bumps. The method according to the present invention is advantageous insofar as it permits a simple production of a chip card, which requires only a few method steps and is therefore also economical.

Abstract: An electronic contacting method for contacting a chip having a plurality of conductive contact areas, which are not provided with an additional metallization layer, a carrier substrate is provided, which has a first surface having arranged thereon a plurality of conductive connecting sections. A non-conductive adhesive layer is arranged on the first surface of the carrier substrate and subsequently, the carrier substrate is aligned with a chip to be contacted in such away that a plurality of conductive contact areas on said chip to be contacted is in alignment with the connecting sections on the first surface of said carrier substrate. Then the carrier substrate is connected to the chip to be contacted by means of the adhesive layer in such a way that the connecting sections of the carrier substrate and the contact areas of the chip abut on one another by means of pressure contact, without any intermetallic connection being established.

Abstract: The present invention relates to a method of forming a structured metallization on a semiconductor wafer, wherein a main surface of the wafer has a passivation layer applied thereto, which is structured so as to determine at least one bond pad. Initially, a metal bump is produced on the at least one bond pad. An activated dielectric is then produced on the areas of the passivation layer on which the structured metallization is to be formed. Finally, metal is chemically deposited directly on the activated dielectric and on the metal bump in such a way that the structured metallization formed on the activated dielectric and the metal chemically deposited on the metal bump are electro-conductively joined.

Abstract: Method and apparatus for the testing of substrates which are provided with a wiring structure, in particular, chips (21), in conjunction with which, by means of a solder-deposit carrier (25) which is provided with a structured, electrically conductive coating (12) with bond pads (17) for the arranging of solder deposits (28) and their transfer to correspondingly arranged bond pads (22) of a substrate (21), an electrical check of the wiring structure of the substrate (21) takes place during the transfer of the solder deposits (28).

Abstract: Method and apparatus for the testing of substrates which are provided with a wiring structure, in particular, chips (21), in conjunction with which, by means of a solder-deposit carrier (25) which is provided with a structured, electrically conductive coating (12) with bond pads (17) for the arranging of solder deposits (28) and their transfer to correspondingly arranged bond pads (22) of a substrate (21), an electrical check of the wiring structure of the substrate (21) takes place during the transfer of the solder deposits (28).

Abstract: In a contact-bumpless chip contacting method for contacting a chip having a plurality of conductive contact areas, which are not provided with an additional metallization layer, a carrier substrate is provided, which has a first surface having arranged thereon a plurality of conductive connecting sections. A non-conductive adhesive layer is arranged on the first surface of the carrier substrate and subsequently, the carrier substrate is aligned with the chip to be contacted such that a plurality of conductive contact areas on the chip to be contacted is in alignment with the connecting sections on the first surface of the carrier substrate. Then the carrier substrate is connected to the chip to be contacted by means of the adhesive layer in such a way that the connecting sections of the carrier substrate and the contact areas of the chip abut on one another by means of pressure contact, without any intermetallic connection being established.

Abstract: Method for the preparation of electrodeposited or galvanically deposited bumps for the bonding of integrated circuits, characterized by two subsequent metal depositions, deposited without an external current source (chemical metal deposition) on a metallization 1, the first deposition being thicker than the second and the second deposition being more even or more regular throughout a large area than the first one.

Abstract: The invention concerns flip chip technology using non-conductive adhesives and gold ball bumps or connectors. The concept is to simultaneously attach and interconnect bare chips with gold ball bumps to organic substrates. The chip is fixed by cooling the insulative adhesive. Environmental testing has demonstrated that performance characteristics were acceptable after 1000 hours of continuous exposure to humidity, and were excellent after 1000 temperature cycles. Such stable interconnections can only be realized by the compliance of the flip chip joint. This stability, can be achieved by precise control of the bonding parameters such as temperature and pressure. This bonding technique allows quality attachment of bare chips on low cost organic substrates.

Abstract: The invention relates to a solder bump for flip-chip assembly and consist of a core containing a high proportion of a soft and electrically well conducting metal, particularly gold, and a diffusion barrier layer deposited on the solder bump core. As is known, the diffusion barrier layer functions to prevent intermetallic compounds between the gold of the solder bump core and the solder material, especially tin-lead solder material, which would otherwise reduce the mechanical stability of the solder connection. A pre-treatment with a cleaning solvent or in a nucleation bath has hitherto been necessary. to provide a good bond between the diffusion barrier layer, usually nickel, and the solder bump core. With the invention, this pretreatment process step is no longer necessary, since small amounts of a material are added to the solder bump core which acts as a nucleation material for the diffusion barrier layer.