Patents by Inventor Roman Lennart Tschirbs

Roman Lennart Tschirbs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9000580
    Abstract: A power semiconductor module includes a baseplate having a top side, an underside, and a depression formed in the baseplate. The depression extends into the baseplate proceeding from the top side. A thickness of the baseplate is locally reduced in a region of the depression. The power semiconductor module further includes a circuit carrier arranged above the depression on the top side of the baseplate such that the depression is interposed between the circuit carrier and the underside of the baseplate.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: April 7, 2015
    Assignee: Infineon Technologies AG
    Inventors: Torsten Groening, Mark Essert, Christian Steininger, Roman Lennart Tschirbs
  • Patent number: 7212063
    Abstract: A half-bridge circuit, in which an input signal that is applied between two input terminals can be picked up at a phase output comprises two switching transistors controlled by a respective control signal that is applied between a control electrode and an auxiliary electrode and two diodes. The first input terminal is connected to the first electrode of the first switching transistor and to the first diode's cathode. A second electrode of the first switching transistor is connected to the first diode's anode by means of the phase output, via a line, to a first electrode of the second switching transistor and to a cathode of the second diode. A second electrode of the second switching transistor is connected to an anode of the second diode and to the second input terminal. The auxiliary electrode of the first switching transistor is connected to the line of the phase output.
    Type: Grant
    Filed: November 1, 2004
    Date of Patent: May 1, 2007
    Assignee: Eupec Europaische Gesellschaft fur Leistungshalbleiter mbH Max-Planck-Str. 5
    Inventors: Mark Nils Münzer, Roman Lennart Tschirbs