Abstract: Adjusting slope compensation. At least one example embodiment is a method including: operating a switching power converter comprising a charge control switch, the charge control switch configured to control power flow through the switching power converter, and the operating by a circuit controller; measuring, by the circuit controller, an attribute of duty cycle of a first period of the charge control switch; measuring, by the circuit controller, an attribute of duty cycle of a second period of the charge control switch; measuring, by the circuit controller, an attribute of duty cycle of a third period of the charge control switch; determining, by the circuit controller, that the switching power converter is experiencing subharmonic oscillation based on the first, second, and third attributes of duty cycle; and changing, by the circuit controller, an attribute of slope compensation responsive to the determining that the switching power supply is experiencing subharmonic oscillation.

Abstract: Switching circuits, half-bridge power converters, and methods for operating a switching circuit including a switching transistor coupled to a load. The method includes applying, with a driver, a gate voltage to the switching transistor. The method also includes generating, with a feedback capacitor, a feedback current based on a change in a voltage sensed at a drain terminal of the switching transistor when the switching transistor turns on. The method further includes applying the feedback current to the driver to limit the gate voltage applied to the switching transistor. The method also includes adjusting, with a controller, a switching slew rate of the switching transistor by draining an amount of the feedback current.

Abstract: Switching circuits, half-bridge power converters, and methods for operating a switching circuit including a switching transistor coupled to a load. The method includes applying, with a driver, a gate voltage to the switching transistor. The method also includes generating, with a feedback capacitor, a feedback current based on a change in a voltage sensed at a drain terminal of the switching transistor when the switching transistor turns on. The method further includes applying the feedback current to the driver to limit the gate voltage applied to the switching transistor. The method also includes adjusting, with a controller, a switching slew rate of the switching transistor by draining an amount of the feedback current.

Abstract: Adjusting slope compensation. At least one example embodiment is a method including: operating a switching power converter comprising a charge control switch, the charge control switch configured to control power flow through the switching power converter, and the operating by a circuit controller; measuring, by the circuit controller, an attribute of duty cycle of a first period of the charge control switch; measuring, by the circuit controller, an attribute of duty cycle of a second period of the charge control switch; measuring, by the circuit controller, an attribute of duty cycle of a third period of the charge control switch; determining, by the circuit controller, that the switching power converter is experiencing subharmonic oscillation based on the first, second, and third attributes of duty cycle; and changing, by the circuit controller, an attribute of slope compensation responsive to the determining that the switching power supply is experiencing subharmonic oscillation.

Abstract: In one embodiment, a resonant converter circuit may be formed to include a light-load control circuit that forms a sequence to control one or more transistors wherein the sequence includes a drive interval having a drive pattern to drive the one or more transistors and a subsequent Off-interval wherein the one or more transistors are switched. A first circuit of the light-load control circuit may be configured to form the drive pattern as a repeated sequence of a pulse set that sequentially enables the one or more transistors with a base set followed by a number of non-switching intervals wherein each non-switching interval is a period of a signal formed in response to driving the one or more transistors with the base set.

Abstract: Controlling switching frequency of LLC resonant power converters. At least one example embodiment is a method of operating LLC converter, including: measuring values indicative of current through a primary winding of a transformer of an LLC converter, the measuring during a first on-time of a first switching period of an electrically controlled switch coupled to the primary winding, and the measuring creates a current waveform; calculating a slope of the current waveform; and controlling frequency of switching the electrically controlled switch based on the slope.

Abstract: Resonant power converters. Example embodiments are integrated circuit controllers for a resonant power converter, the controllers including: a frequency controller configured to control frequency of signals driven to a high-side gate terminal and a low-side gate terminal; a fault detector configured to sense an overcurrent condition of a primary winding of the resonant power converter, and to assert an overcurrent signal responsive to the overcurrent condition; a feedback controller that, during periods of time when the overcurrent signal is de-asserted, is configured to sense a signal representative of output voltage by way of the feedback terminal and to create an intermediate signal; and the feedback controller further configured to, during periods when the overcurrent signal is asserted, modify the intermediate signal to increase the frequency of the signals driven to the high-side gate terminal and the low-side gate terminal.

Abstract: In one embodiment, a resonant converter circuit may be formed to include a light-load control circuit that forms a sequence to control one or more transistors wherein the sequence includes a drive interval having a drive pattern to drive the one or more transistors and a subsequent Off-interval wherein the one or more transistors are switched. A first circuit of the light-load control circuit may be configured to form the drive pattern as a repeated sequence of a pulse set that sequentially enables the one or more transistors with a base set followed by a number of non-switching intervals wherein each non-switching interval is a period of a signal formed in response to driving the one or more transistors with the base set.

Abstract: Resonant power converters. Example embodiments are integrated circuit controllers for a resonant power converter, the controllers including: a frequency controller configured to control frequency of signals driven to a high-side gate terminal and a low-side gate terminal; a fault detector configured to sense an overcurrent condition of a primary winding of the resonant power converter, and to assert an overcurrent signal responsive to the overcurrent condition; a feedback controller that, during periods of time when the overcurrent signal is de-asserted, is configured to sense a signal representative of output voltage by way of the feedback terminal and to create an intermediate signal; and the feedback controller further configured to, during periods when the overcurrent signal is asserted, modify the intermediate signal to increase the frequency of the signals driven to the high-side gate terminal and the low-side gate terminal.

Abstract: In one embodiment, a resonant converter circuit may be formed to include a light-load control circuit that forms a sequence to control one or more transistors wherein the sequence includes a drive interval having a drive pattern to drive the one or more transistors and a subsequent Off-interval wherein the one or more transistors are switched. A first circuit of the light-load control circuit may be configured to form the drive pattern as a repeated sequence of a pulse set that sequentially enables the one or more transistors with a base set followed by a number of non-switching intervals wherein each non-switching interval is a period of a signal formed in response to driving the one or more transistors with the base set.

Abstract: In one embodiment, a resonant converter circuit may be formed to include a light-load control circuit that forms a sequence to control one or more transistors wherein the sequence includes a drive interval having a drive pattern to drive the one or more transistors and a subsequent Off-interval wherein the one or more transistors are switched. A first circuit of the light-load control circuit may be configured to form the drive pattern as a repeated sequence of a pulse set that sequentially enables the one or more transistors with a base set followed by a number of non-switching intervals wherein each non-switching interval is a period of a signal formed in response to driving the one or more transistors with the base set.

Abstract: A power conversion circuit includes a high-side MOSFET and a low-side MOSFET. A conduction terminal of the high-side MOSFET is coupled to a conduction terminal of the low-side MOSFET at a half-bridge (HB) circuit node. The high-side MOSFET is switched off. Voltage potential transitions of the HB circuit node are counted while the high-side MOSFET and low-side MOSFET are off. Assertion of a control signal to the low-side MOSFET is postponed for two voltage potential transitions of the HB circuit node after the high-side MOSFET is switched off. The low-side MOSFET is switched off by de-asserting the control signal to the low-side MOSFET. Switching on the high-side MOSFET is postponed for two voltage potential transitions of the HB circuit node after switching off the low-side MOSFET.

Abstract: A power conversion circuit is provided. A power level of the power conversion circuit is determined by taking a first sample of a voltage potential of a resonant capacitor at a first time. A second sample of the voltage potential of the resonant capacitor voltage is taken at a second time. An electric current is determined based on the first sample and second sample.

Abstract: A power conversion circuit includes a high-side MOSFET and a low-side MOSFET. A conduction terminal of the high-side MOSFET is coupled to a conduction terminal of the low-side MOSFET at a half-bridge (HB) circuit node. The high-side MOSFET is switched off. Voltage potential transitions of the HB circuit node are counted while the high-side MOSFET and low-side MOSFET are off. Assertion of a control signal to the low-side MOSFET is postponed for two voltage potential transitions of the HB circuit node after the high-side MOSFET is switched off. The low-side MOSFET is switched off by de-asserting the control signal to the low-side MOSFET. Switching on the high-side MOSFET is postponed for two voltage potential transitions of the HB circuit node after switching off the low-side MOSFET.

Abstract: A power conversion circuit includes a high-side MOSFET and a low-side MOSFET. A conduction terminal of the high-side MOSFET is coupled to a conduction terminal of the low-side MOSFET at a half-bridge (HB) circuit node. The high-side MOSFET is switched off. Voltage potential transitions of the HB circuit node are counted while the high-side MOSFET and low-side MOSFET are off. Assertion of a control signal to the low-side MOSFET is postponed for two voltage potential transitions of the HB circuit node after the high-side MOSFET is switched off. The low-side MOSFET is switched off by de-asserting the control signal to the low-side MOSFET. Switching on the high-side MOSFET is postponed for two voltage potential transitions of the HB circuit node after switching off the low-side MOSFET.

Abstract: A power conversion circuit includes a high-side MOSFET and a low-side MOSFET. A conduction terminal of the high-side MOSFET is coupled to a conduction terminal of the low-side MOSFET at a half-bridge (HB) circuit node. The high-side MOSFET is switched off. Voltage potential transitions of the HB circuit node are counted while the high-side MOSFET and low-side MOSFET are off. Assertion of a control signal to the low-side MOSFET is postponed for two voltage potential transitions of the HB circuit node after the high-side MOSFET is switched off. The low-side MOSFET is switched off by de-asserting the control signal to the low-side MOSFET. Switching on the high-side MOSFET is postponed for two voltage potential transitions of the HB circuit node after switching off the low-side MOSFET.

Abstract: A power conversion circuit is provided. A power level of the power conversion circuit is determined by taking a first sample of a voltage potential of a resonant capacitor at a first time. A second sample of the voltage potential of the resonant capacitor voltage is taken at a second time. An electric current is determined based on the first sample and second sample.

Abstract: A method and semiconductor device for controlling skip mode operation during light load conditions in a resonant power converter includes a skip mode controller circuit that compares a feedback signal corresponding to the secondary output level with a reference voltage to determine when to invoke skip mode. When entering skip mode the skip mode controller ceases switching by turning on the lower switch for a prolonged time to leave the resonant capacitor partially charged. Upon resuming switching, the lower switch is turned on first to drive current through the inductances, and asymmetric switching is used where the upper switch is on, initially for shorter periods to allow zero voltage switching. If the load increases, the on-time of upper and lower switches converge and conventional symmetric switching resumes.

Abstract: In one embodiment, a power supply controller may be configured to form a status signal that is representative of a secondary current by substantially removing a primary magnetization component from a primary current signal and to use the status signal to form a first signal that is representative of a delivered output power, and configured to adjust an on-time of one of a first or second switch responsively to the delivered output power.

Abstract: A method and semiconductor device for a resonant power converter includes logic circuitry that performs a dedicated startup sequence when power is first provided to the resonant converter. The logic circuitry can discharge the resonant capacitor, then iteratively pulse only an upper switch during a portion of the startup sequence, and measures the dead time between the half bridge signal starting to fall and the next time it finishes rising. If the dead time is greater that a startup exit value, which is based on the most recent upper switch on-time, then the upper switch on-time is incremented and the process is repeated until the dead time is less than the startup exit value, whereupon the startup logic transitions to conventional symmetric switching.