Patents by Inventor Ronald Charles Roth

Ronald Charles Roth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9335540
    Abstract: A microelectromechanical (MEMS) device has a movable member supported above a substrate on a via support. The member and via support are fabricated integrally from first and second member forming layers. A first member forming layer forms a lower part of the member and supporting structure for the via support. First and second fill layers are deposited and patterned to form a plug that fills an inner cavity opening in the via structure. The plug is planarized to a planar part of the first member forming layer, and a second member forming layer is deposited over the first member forming layer and the planarized plug to form an upper part of the member. The via support may have a cavity filled by BARC layers.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: May 10, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Lucius Marshall Sherwin, Jose Antonio Martinez, Ronald Charles Roth, Sean Christopher O'Brien
  • Publication number: 20150103391
    Abstract: A microelectromechanical (MEMS) device has a movable member supported above a substrate on a via support. The member and via support are fabricated integrally from first and second member forming layers. A first member forming layer forms a lower part of the member and supporting structure for the via support. First and second fill layers are deposited and patterned to form a plug that fills an inner cavity opening in the via structure. The plug is planarized to a planar part of the first member forming layer, and a second member forming layer is deposited over the first member forming layer and the planarized plug to form an upper part of the member. In an example micromirror device, metal layers define a movable mirror member supported on a via support which has a cavity filled by BARC layers. The BARC layers are planarized to a planar portion of a first metal layer and a second metal layer is formed over the first metal layer planar portion and planarized BARC layer plug.
    Type: Application
    Filed: December 17, 2013
    Publication date: April 16, 2015
    Inventors: Lucius Marshall Sherwin, Jose Antonio Martinez, Ronald Charles Roth, Sean Christopher O'Brien
  • Patent number: 8124321
    Abstract: In a lithography process using an ultraviolet process, the applied ultraviolet resist can be removed by intentionally condensing the ultraviolet resist before removing the ultraviolet resist.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: February 28, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Ronald Charles Roth, Georgina Marie Park, Rosemary Urmese Anthraper
  • Patent number: 8112168
    Abstract: A manufacturing process including a controller method to generate a tool setting which includes a tool offset and a device offset. The controller method uses a device parameter measurement to update the tool offset and device offset. A tool weight and a device weight is assigned so that only one of the tool offset and device offset is significantly changed during the update. The process may be applied to semiconductor device manufacturing and particularly to integrated circuit fabrication.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: February 7, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Madhu Sudan Ramavajjala, Kristi Bushman, Robert Ray Spangler, Stephen Arlon Meinser, Ronald Charles Roth
  • Publication number: 20110029119
    Abstract: A manufacturing process including a controller method to generate a tool setting which includes a tool offset and a device offset. The controller method uses a device parameter measurement to update the tool offset and device offset. A tool weight and a device weight is assigned so that only one of the tool offset and device offset is significantly changed during the update. The process may be applied to semiconductor device manufacturing and particularly to integrated circuit fabrication.
    Type: Application
    Filed: July 29, 2009
    Publication date: February 3, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Madhu Sudan RAMAVAJJALA, Kristi BUSHMAN, Robert Ray SPANGLER, Stephen Arlon MEISNER, Ronald Charles ROTH
  • Publication number: 20100068663
    Abstract: Method for removing contaminants from a surface during semiconductor fabrication. A preferred embodiment comprises developing a resist layer on a top surface of a semiconductor substrate, curing the developed resist layer, and cleaning the developed resist layer with a developer solution to remove contaminants. The cleaning makes use of the same developer solution used to develop the resist layer, so the cleaning makes use of a process that already exists and requires no additional investment to implement, while the curing stabilizes the developed resist layer so that the cleaning does not damage the developed resist layer.
    Type: Application
    Filed: November 18, 2009
    Publication date: March 18, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Erika Lee McFadden, Ronald Charles Roth, Lisa Ann Wesneski
  • Publication number: 20100028810
    Abstract: In a lithography process using an ultraviolet process, the applied ultraviolet resist can be removed by intentionally condensing the ultraviolet resist before removing the ultraviolet resist.
    Type: Application
    Filed: August 4, 2008
    Publication date: February 4, 2010
    Applicant: Texas Instruments Incorporated
    Inventors: Ronald Charles Roth, Georgina Marie Park, Rosemary Urmese Anthraper
  • Patent number: 7622244
    Abstract: Method for removing contaminants from a surface during semiconductor fabrication. A preferred embodiment comprises developing a resist layer on a top surface of a semiconductor substrate, curing the developed resist layer, and cleaning the developed resist layer with a developer solution to remove contaminants. The cleaning makes use of the same developer solution used to develop the resist layer, so the cleaning makes use of a process that already exists and requires no additional investment to implement, while the curing stabilizes the developed resist layer so that the cleaning does not damage the developed resist layer.
    Type: Grant
    Filed: April 20, 2006
    Date of Patent: November 24, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Erika Lee McFadden, Ronald Charles Roth, Lisa Ann Wesneski
  • Publication number: 20080316579
    Abstract: System and method for maximizing image quality by eliminating vias on a reflective surface. A preferred embodiment comprises depositing a first portion of a mirror surface over a support surface, applying a protective coating on the mirror surface, and then inverting the via. The preferred embodiment also comprises removing a portion of the inverted via and then depositing a second portion of the mirror surface. The remaining portion of the inverted via fills the via and provides a level surface for the depositing of the second portion of the mirror surface, reducing the amount of light scattered by the via.
    Type: Application
    Filed: August 7, 2008
    Publication date: December 25, 2008
    Applicant: Texas Instruments Incorporated
    Inventors: Ronald Charles Roth, Timothy Joseph Hogan, Lucius Sherwin
  • Patent number: 7430072
    Abstract: System and method for maximizing image quality by eliminating vias on a reflective surface. A preferred embodiment comprises depositing a first portion of a mirror surface over a support surface, applying a protective coating on the mirror surface, and then inverting the via. The preferred embodiment also comprises removing a portion of the inverted via and then depositing a second portion of the mirror surface. The remaining portion of the inverted via fills the via and provides a level surface for the depositing of the second portion of the mirror surface, reducing the amount of light scattered by the via.
    Type: Grant
    Filed: April 12, 2006
    Date of Patent: September 30, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Ronald Charles Roth, Timothy Joseph Hogan, Lucius Sherwin