Patents by Inventor Ronald D. Malcolm
Ronald D. Malcolm has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10409751Abstract: A method and information handling system including a first universal serial bus (USB) type C port for transceiving SMBus data multiplexed over unused USB-2 pins from a host information handling system, a first multiplexer for demultiplexing the SMBus as a designated data bus to a second multiplexer to create a designated bus for management controller transport protocol data, the second multiplexer re-multiplexing the SMBus designated bus to a second USB type C port for connection with an out-of-band management hardware system network interface card of a device connected to the second USB type C port for communication of management controller transport protocol data with the information handling system host and bypassing a docking station high capacity connector multiplex controller, and an embedded controller for activating the first multiplexer and the second multiplexer upon detecting the connection with the out-of-band management hardware system network interface card via the second USB type C port and estType: GrantFiled: April 11, 2017Date of Patent: September 10, 2019Assignee: Dell Products, LPInventors: Nicholas D. Grobelny, Joshua N. Alperin, Marcin M. Nowak, Sean P. O'Neal, Akash Malhotra, Ronald D. Malcolm
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Publication number: 20180293197Abstract: A method and information handling system including a first universal serial bus (USB) type C port for transceiving SMBus data multiplexed over unused USB-2 pins from a host information handling system, a first multiplexer for demultiplexing the SMBus as a designated data bus to a second multiplexer to create a designated bus for management controller transport protocol data, the second multiplexer re-multiplexing the SMBus designated bus to a second USB type C port for connection with an out-of-band management hardware system network interface card of a device connected to the second USB type C port for communication of management controller transport protocol data with the information handling system host and bypassing a docking station high capacity connector multiplex controller, and an embedded controller for activating the first multiplexer and the second multiplexer upon detecting the connection with the out-of-band management hardware system network interface card via the second USB type C port and estType: ApplicationFiled: April 11, 2017Publication date: October 11, 2018Applicant: Dell Products, LPInventors: Nicholas D. Grobelny, Joshua N. Alperin, Marcin M. Nowak, Sean P. O'Neal, Akash Malhotra, Ronald D. Malcolm
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Patent number: 6952621Abstract: A single chip audio system 100 includes a bus interface 101, digital to analog converters 110, an analog mixer 115, and analog spatial enhancement circuitry 7500. Digital to analog converters 110 convert digital audio data received through bus interface 101 into analog signals. Analog mixer 115 mixes signals received from digital to analog converters 110 with an analog signal received from an external source. Analog spatial enhancement circuitry 7500 enhances first and second mixed analog signals output from analog mixer 115.Type: GrantFiled: November 20, 2000Date of Patent: October 4, 2005Assignee: Crystal Semiconductor Corp.Inventors: Ronald D. Malcolm, Jr., Jeff Klaas, Mark Gentry, Phillip Matthews
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Patent number: 6405093Abstract: Amplitude control circuitry 5000 includes a first register 5001 for storing received amplitude control data and a second register 5002 for storing amplitude control data transfered from first register 5001. Output circuitry 5005, 5006, 5007 controls the amplitude of a received signal in response to amplitude data transferred from second register. A sensor 5003 determines when data stored in first register 5001 and second register 5002 does not match and enables a comparator 5004 when data in first register 5001 and, second register 5002 does not match. Comparator 5004 compares a signal output from output circuitry 5005, 5006, 5007 with a reference signal and generates a signal for enabling the transfer of data from first register 5001 to second register 5002 when the signal output from output circuitry 5005, 5006, 5007 falls within a window defined by the reference voltage.Type: GrantFiled: February 26, 1998Date of Patent: June 11, 2002Assignee: Cirrus Logic, Inc.Inventors: Ronald D. Malcolm, Jr., Jeff Klaas, Mark Gentry, Phillip Matthews
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Patent number: 6373954Abstract: A single chip audio system 100 includes a bus interface 101, digital to analog converters 110, an analog mixer 115, and analog spatial enhancement circuitry 7500. Digital to analog converters 110 convert digital audio data received through bus interface 101 into analog signals. Analog mixer 115 mixes signals received from digital to analog converters 110 with an analog signal received from an external source. Analog spatial enhancement circuitry 7500 enhances first and second mixed analog signals output from analog mixer 115.Type: GrantFiled: October 14, 1997Date of Patent: April 16, 2002Assignee: Cirrus Logic, Inc.Inventors: Ronald D. Malcolm, Jr., Jeff Klaas, Mark Gentry, Phillip Matthews
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Patent number: 6310653Abstract: A periodic multi-bit digital signal is synthesized having a frequency that is specified by the frequency of a periodic reference signal that is asynchronous with respect to a sampling clock of the periodic digital signal. In a digital video system, for example, a digital color subcarrier is synthesized and synchronized to a reference frequency of a crystal oscillator that is asynchronous with respect to a digital system clock for the digital video system. The periodic digital signal is generated by an adjustable digital oscillator clocked by the sampling clock. The frequency or phase of the periodic digital signal is compared to the frequency or phase of the periodic reference signal to produce an adjustment value for adjusting the periodic digital signal to synchronize the periodic digital signal with the periodic reference signal. The digital oscillator, for example, generates the periodic digital signal at the sampling rate by periodically incrementing an accumulator with the adjustment value.Type: GrantFiled: April 27, 1998Date of Patent: October 30, 2001Inventors: Ronald D. Malcolm, Jr., Juergen Lutz
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Patent number: 6301366Abstract: An audio system 100 disposed on a single chip includes an output mixer 115 having inputs for receiving first digital audio data of a first bit width from a first digital-to-analog converter 110, digital audio data of a second bit width from a second digital-to-analog converter 6601, and analog data from an external port. An output port drives an analog signal output from the output mixer. An input mixer 114 has inputs for receiving analog data from a plurality of sources and analog-to-digital converters 111 to convert an analog output from the input mixer into digital data. An input path transmits the digital data output from the analog to digital convertors 111 to an external digital bus.Type: GrantFiled: February 26, 1998Date of Patent: October 9, 2001Assignee: Cirrus Logic, Inc.Inventors: Ronald D. Malcolm, Jr., Jeff Klaas
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Patent number: 6052152Abstract: A periodic multi-bit digital signal is synthesized having a frequency that is specified by the frequency of a periodic reference signal that is asynchronous with respect to a sampling clock of the periodic digital signal. In a digital video system, for example, a digital color subcarrier is synthesized and synchronized to a reference frequency of a crystal oscillator that is asynchronous with respect to a digital system clock for the digital video system. The periodic digital signal is generated by an adjustable digital oscillator clocked by the sampling clock. The frequency or phase of the periodic digital signal is compared to the frequency or phase of the periodic reference signal to produce an adjustment value for adjusting the periodic digital signal to synchronize the periodic digital signal with the periodic reference signal. The digital oscillator, for example, generates the periodic digital signal at the sampling rate by periodically incrementing an accumulator with the adjustment value.Type: GrantFiled: April 27, 1998Date of Patent: April 18, 2000Assignee: Crystal Semiconductor Corp.Inventors: Ronald D. Malcolm, Jr., Juergen M Lutz
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Patent number: 5808691Abstract: A periodic multi-bit digital signal is synthesized having a frequency that is specified by the frequency of a periodic reference signal that is asynchronous with respect to a sampling clock of the periodic digital signal. In a digital video system, for example, a digital color subcarrier is synthesized and synchronized to a reference frequency of a crystal oscillator that is asynchronous with respect to a digital system clock for the digital video system. The periodic digital signal is generated by an adjustable digital oscillator clocked by the sampling clock. The frequency or phase of the periodic digital signal is compared to the frequency or phase of the periodic reference signal to produce an adjustment value for adjusting the periodic digital signal to synchronize the periodic digital signal with the periodic reference signal. The digital oscillator, for example, generates the periodic digital signal at the sampling rate by periodically incrementing an accumulator with the adjustment value.Type: GrantFiled: December 12, 1995Date of Patent: September 15, 1998Assignee: Cirrus Logic, Inc.Inventors: Ronald D. Malcolm, Jr., Juergen M. Lutz
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Patent number: 5258750Abstract: A color synchronizer and windowing system for use in a video or video/graphics system which uses digital television technology integrated circuits to digitize the video information. The digitized video information is stored in a frame buffer as luminance and chrominance data samples. The frame buffer also stores a chrominance reference synchronization signal which is synchronized to the digitized chrominance data samples so as to properly identify the boundary for each chrominance data sample; wherein each such chrominance data sample is associated with a plurality of luminance data samples. This encoded data insures that the luminance and chrominance data samples are properly decoded on chrominance data sample boundaries even though the synchronization signal normally associated with the digital television technology integrated circuits is not available due to the storage of the luminance and chrominance data samples within the frame buffer.Type: GrantFiled: September 21, 1989Date of Patent: November 2, 1993Assignee: New Media Graphics CorporationInventors: Ronald D. Malcolm, Jr., Richard R. Tricca
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Patent number: 4688095Abstract: Data to be stored in a frame buffer (12) that stores data representing an image are drawn from a look-up table (34). The look-up table (34) contains conversion data and is addressed by the output of a multiplexer circuit (24). The multiplexer circuit (24) receives its inputs from the data output port of the frame buffer (12), from a register (42), and from an analog-to-digital converter (22) that converts the output of a video camera (20) to digital signals. In response to different values on selection-signal lines (36), the multiplexer circuit (24) assembles the address that it applies to the look-up table (34) from different combinations of the outputs of the frame buffer (12), the register (42), and the analog-to-digital-converter (22).Type: GrantFiled: February 7, 1986Date of Patent: August 18, 1987Assignee: Image Technology IncorporatedInventors: Mirza R. Beg, Julius Perl, Ronald D. Malcolm, Jr.
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Patent number: 4484303Abstract: An improved programmable controller having the ability to use two different data bases while presenting to the outside world a uniform word size. The programmable controller includes pipeline processing and hardware solution of a user control program in a network node format. A memory management scheme is provided allowing for the direct addressability of one-half million words by utilization of a page register. The programmable controller can be incorporated into a network containing other programmable controllers. The programmable controller also incorporates a multi-task interrupt so that the processor can handle more than one job at any particular time. Input/output tasks are handled logically in the scan solving the user networks rather than being based upon a particular physical area of the controller memory.Type: GrantFiled: July 20, 1981Date of Patent: November 20, 1984Assignee: Gould Inc.Inventors: Salvatore R. Provanzano, Wilbert H. Aldrich, Robert A. D'Angelo, Emil P. Drottar, John J. Finnegan, Jr., James Heom, Lawrence W. Hill, Ronald D. Malcolm, Michael C. Nollet, Baruch S. Perlman, Michael B. Tressler, John E. Van Schalkwyk, Kincade N. Webb
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Patent number: 4307447Abstract: An improved programmable controller having the ability to use two different data bases while presenting to the outside world a uniform word size. The programmable controller includes pipeline processing and hardware solution of a user control program in a network node format. A memory management scheme is provided allowing for the direct addressability of one-half million words by utilization of a page register. The programmable controller can be incorporated into a network containing other programmable controllers. The programmable controller also incorporates a multi-task interrupt so that the processor can handle more than one job at any particular time. Input/output tasks are handled logically in the scan solving the user networks rather than being based upon a particular physical area of the controller memory.Type: GrantFiled: June 19, 1979Date of Patent: December 22, 1981Assignee: Gould Inc.Inventors: Salvatore R. Provanzano, Wilbert H. Aldrich, Robert A. D'Angelo, Emil P. Drottar, John J. Finnegan, Jr., James Heom, Lawrence W. Hill, Ronald D. Malcolm, Michael C. Nollet, Baruch S. Perlman, Michael B. Tressler, John E. VanSchalkwyk, Kincade N. Webb