Patents by Inventor Ronald John Kuse

Ronald John Kuse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150147865
    Abstract: Resistive-switching memory elements having improved switching characteristics are described, including a memory element having a first electrode and a second electrode, a switching layer between the first electrode and the second electrode, the switching layer comprising a first metal oxide having a first bandgap greater than 4 electron volts (eV), the switching layer having a first thickness, and a coupling layer between the switching layer and the second electrode, the coupling layer comprising a second metal oxide having a second bandgap greater the first bandgap, the coupling layer having a second thickness that is less than 25 percent of the first thickness.
    Type: Application
    Filed: February 3, 2015
    Publication date: May 28, 2015
    Inventors: Ronald John Kuse, Tony Chiang, Michael Miller, Prashant Phatak, Jinhong Tong
  • Patent number: 9029233
    Abstract: Resistive-switching memory elements having improved switching characteristics are described, including a memory element having a first electrode and a second electrode, a switching layer between the first electrode and the second electrode, the switching layer comprising a first metal oxide having a first bandgap greater than 4 electron volts (eV), the switching layer having a first thickness, and a coupling layer between the switching layer and the second electrode, the coupling layer comprising a second metal oxide having a second bandgap greater the first bandgap, the coupling layer having a second thickness that is less than 25 percent of the first thickness.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: May 12, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Ronald John Kuse, Tony Chiang, Michael Miller, Prashant Phatak, Jinhong Tong
  • Patent number: 8975613
    Abstract: Resistive-switching memory elements having improved switching characteristics are described, including a memory element having a first electrode and a second electrode, a switching layer between the first electrode and the second electrode, the switching layer comprising a first metal oxide having a first bandgap greater than 4 electron volts (eV), the switching layer having a first thickness, and a coupling layer between the switching layer and the second electrode, the coupling layer comprising a second metal oxide having a second bandgap greater the first bandgap, the coupling layer having a second thickness that is less than 25 percent of the first thickness.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: March 10, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Ronald John Kuse, Tony Chiang, Michael Miller, Prashant Phatak, Jinhong Tong
  • Patent number: 8343813
    Abstract: Resistive-switching memory elements having improved switching characteristics are described, including a memory element having a first electrode and a second electrode, a switching layer between the first electrode and the second electrode comprising hafnium oxide and having a first thickness, and a coupling layer between the switching layer and the second electrode, the coupling layer comprising a material including metal titanium and having a second thickness that is less than 25 percent of the first thickness.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: January 1, 2013
    Assignee: Intermolecular, Inc.
    Inventors: Ronald John Kuse, Imran Hashim, Tony Chiang
  • Patent number: 8298890
    Abstract: A semiconductor memory element is described, including a substrate including a source region, a drain region, and a channel region, a tunnel oxide over the channel region of the substrate, a charge storage layer over the tunnel oxide, a charge blocking layer over the charge storage layer, and a control gate over the charge blocking layer. The charge blocking layer further includes a first layer including a transition metal oxide, a second layer including a metal silicate, a third layer including the transition metal oxide of the first layer.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: October 30, 2012
    Assignee: Intermolecular, Inc.
    Inventors: Ronald John Kuse, Monica Sawkar Mathur, Wen Wu
  • Publication number: 20100258782
    Abstract: Resistive-switching memory elements having improved switching characteristics are described, including a memory element having a first electrode and a second electrode, a switching layer between the first electrode and the second electrode comprising hafnium oxide and having a first thickness, and a coupling layer between the switching layer and the second electrode, the coupling layer comprising a material including metal titanium and having a second thickness that is less than 25 percent of the first thickness.
    Type: Application
    Filed: February 12, 2010
    Publication date: October 14, 2010
    Inventors: Ronald John Kuse, Imran Hashim, Tony Chiang
  • Patent number: 7511321
    Abstract: A dielectric layer may be formed by depositing the dielectric layer to an intermediate thickness and applying a nitridation process to the dielectric layer of intermediate thickness. The dielectric layer may then be deposited to the final, desired thickness.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: March 31, 2009
    Assignee: Intel Corporation
    Inventors: Ronald John Kuse, Tetsuji Yasuda
  • Patent number: 7306956
    Abstract: A variable temperature and/or reactant dose atomic layer deposition (VTD-ALD) process modulates ALD reactor conditions (e.g., temperature, flow rates, etc.) during growth of a film (e.g., metallic) on a wafer to produce different film properties a different film depths.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: December 11, 2007
    Assignee: Intel Corporation
    Inventor: Ronald John Kuse
  • Patent number: 7101811
    Abstract: A dielectric layer may be formed by depositing the dielectric layer to an intermediate thickness and applying a nitridation process to the dielectric layer of intermediate thickness. The dielectric layer may then be deposited to the final, desired thickness.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: September 5, 2006
    Assignee: Intel Corporation
    Inventors: Ronald John Kuse, Tetsuji Yasuda
  • Publication number: 20040224462
    Abstract: A dielectric layer may be formed by depositing the dielectric layer to an intermediate thickness and applying a nitridation process to the dielectric layer of intermediate thickness. The dielectric layer may then be deposited to the final, desired thickness.
    Type: Application
    Filed: May 8, 2003
    Publication date: November 11, 2004
    Inventors: Ronald John Kuse, Tetsuji Yasuda