Patents by Inventor Ronald Kapusta

Ronald Kapusta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8476922
    Abstract: A system and method for implementing a differential signaling driver with a common-mode voltage not equal to one half the power supply voltage using voltage-mode techniques. Embodiments of the present invention maintain balanced impedance at the signal output. In an embodiment, a driver may have multiple operating modes for each potential supply voltage or common-mode voltage. In an embodiment, each potential mode may involve configuring the driver by activating or deactivating switches or resistors in the driver and each potential mode may have different resistor values.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: July 2, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Mark Sayuk, Ronald Kapusta
  • Patent number: 8477053
    Abstract: A resolution detector may be used in conjunction with an ADC to identify unresolved bits in a raw digital output of the ADC. Bits that have been properly resolved by the ADC may be distinguished from those that have not been successfully resolved, because of time limitations or other reasons. Each bit that has not been successfully resolved may be classified and referred to as an unresolved bit. If there are any unresolved bits detected in a sampling cycle, dither may then be incorporated in the raw digital output to compensate for the unresolved bits in that cycle. The dither may be added to the raw digital output of the ADC to eliminate any missing codes in the processed digital output codes or the dither may be substituted for the unresolved bits in raw digital output to generate the processed digital output.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: July 2, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Ronald Kapusta, Doris Lin, Yervant Dermenjian
  • Publication number: 20130162354
    Abstract: A slew rate booster, switchably enabled selector, or other arrangement may be included in a cascode amplifier to keep the current buffer/common gate transistor and the input/common source transistor saturated as the voltage at the source of the current buffer transistor drops during a transient input voltage spike at the gate of the input transistor. In some instances a higher potential may be supplied to a gate of the current buffer transistor during an initial phase of the settling period than during a second phase of the settling period when a lower potential may be applied. Other techniques may be used in different embodiments. Devices and methods are provided.
    Type: Application
    Filed: September 4, 2012
    Publication date: June 27, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventors: Haiyang Zhu, Ronald A. Kapusta
  • Patent number: 8456340
    Abstract: A tracking module that tracks the operation of a digital-to-analog converter (DAC). The DAC tracking module may be included on-chip with a DAC, and be formed with similar circuit components as a DAC. The DAC tracking circuit may output a signal indicating that the DAC within a SAR ADC has settled to an approximate value during each bit conversion. A differential solution is also provided. Power may be optimized because optimal conversion speed may be achieved, and a comparator within the DAC may be turned off or placed in a standby mode at the end of bit conversions, and before the next conversion cycle in response to the signal output by the DAC tracking module.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: June 4, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Ronald Kapusta, Junhua Shen, Doris Lin
  • Patent number: 8390502
    Abstract: Embodiments of the present disclosure may provide a charge redistribution DAC with an on-chip reservoir capacitor to provide charges to the DAC in lieu of traditional external reference voltages. The DAC may include the on-chip reservoir capacitor having a first plate and a second plate, an array of DAC capacitors to generate a DAC output, and an array of switches controlled by a DAC input word to couple the DAC capacitors to the reservoir capacitor. The charge redistribution DAC may further comprise a first switch connecting the first plate to an external terminal for a first external reference voltage, and a second switch connecting the second plate to an external terminal for a second external reference voltage. One embodiment may provide an ADC that includes the charge redistribution DAC.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: March 5, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Ronald Kapusta
  • Patent number: 8339118
    Abstract: In one aspect, a method of reducing power consumption in a circuit by adaptive bias current generation of a bias current configured to bias, at least in part, at least one amplifier of the circuit is provided. The method comprises establishing the bias current based, at least in part, on a reference frequency of a reference clock providing a clock signal to at least one component of the circuit, and changing the bias current in response to a change in the reference frequency of the at least one reference clock, the bias current being change non-linearly with respect to the change in the reference frequency of the at least one reference clock. In another aspect, the method comprises establishing the bias current based, at least in part, on a capacitance of a reference capacitor, and changing the bias current in response to a change in the capacitance of the reference capacitor such that the bias current is changed non-linearly with respect to changes in the capacitance of the reference capacitor.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: December 25, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Ronald A. Kapusta, Jr.
  • Publication number: 20120306671
    Abstract: An uncalibrated converter element in an analog-digital converter may be replaced with two or more smaller elements having an effective total net value that is equal to that of the uncalibrated converter element. In an exemplary case where the element is capacitor, one or more of these smaller capacitors may be independently calibrated by switching the smaller capacitor between two voltages, such as a reference voltage and ground, and then calculating a difference of corresponding digital output codes generated by the backend ADC with previously calibrated capacitors associated with lesser significant bits. The total capacitance of the uncalibrated capacitor may be apportioned between the smaller capacitors so that the individual maximum charge contribution of each smaller capacitor to the converter output together with any expected manufacturing variance does not exceed the aggregated contribution of the previously calibrated capacitors.
    Type: Application
    Filed: December 6, 2011
    Publication date: December 6, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Ronald A. Kapusta, Junhua Shen
  • Publication number: 20120306675
    Abstract: A resolution detector may be used in conjunction with an ADC to identify unresolved bits in a raw digital output of the ADC. Bits that have been properly resolved by the ADC may be distinguished from those that have not been successfully resolved, because of time limitations or other reasons. Each bit that has not been successfully resolved may be classified and referred to as an unresolved bit. If there are any unresolved bits detected in a sampling cycle, dither may then be incorporated in the raw digital output to compensate for the unresolved bits in that cycle. The dither may be added to the raw digital output of the ADC to eliminate any missing codes in the processed digital output codes or the dither may be substituted for the unresolved bits in raw digital output to generate the processed digital output.
    Type: Application
    Filed: November 18, 2011
    Publication date: December 6, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Ronald A. Kapusta, Doris Lin, Yervant Dermenjian
  • Publication number: 20120299618
    Abstract: A system and method for implementing a differential signaling driver with a common-mode voltage not equal to one half the power supply voltage using voltage-mode techniques. Embodiments of the present invention maintain balanced impedance at the signal output. In an embodiment, a driver may have multiple operating modes for each potential supply voltage or common-mode voltage. In an embodiment, each potential mode may involve configuring the driver by activating or deactivating switches or resistors in the driver and each potential mode may have different resistor values.
    Type: Application
    Filed: May 27, 2011
    Publication date: November 29, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Mark SAYUK, Ronald KAPUSTA
  • Publication number: 20120274488
    Abstract: Embodiments of the present disclosure may provide a charge redistribution DAC with two sets of capacitors that provides a DAC output by sharing charges between a plurality of pairs of capacitors in lieu of charging the capacitors using traditional external reference voltages. The charge redistribution DAC may comprise a plurality of pairs of first and second capacitors that each has a first side and a second side, and a group of first switches and a group of second switches. Each first or second switch selectively controls connection of the first side of a respective first or second capacitor to one of a pair of output signal lines according to a DAC input word. The charge redistribution DAC further may comprise a group of bridging switches each connected between second sides of paired first and second capacitors.
    Type: Application
    Filed: April 28, 2011
    Publication date: November 1, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventor: Ronald KAPUSTA
  • Publication number: 20120274363
    Abstract: An architecture of an integrated circuit allows for the canceling of noise sampled on a capacitor in the integrated circuit, after an input signal has already been sampled. Thermal noise correlated with an arbitrary input signal may be canceled after selectively controlling a plurality of switching devices during a sequence of clock phases. An auxiliary capacitor may be used to store a voltage equal to the thermal noise and enable the cancellation of the thermal noise from the sampled signal in conjunction with a noise cancellation unit.
    Type: Application
    Filed: April 28, 2011
    Publication date: November 1, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Ronald A. KAPUSTA, Colin LYDEN, Haiyang ZHU
  • Publication number: 20120268185
    Abstract: An adaptive delay device that provides a delay to a signal based on circuit conditions such as temperature, supply voltage values and/or fabrication processes. The adaptive delay device may respond to circuit conditions by charging a capacitive device to a threshold voltage. A comparator may incorporate the adaptive delay device to provide adaptive timing for the comparator functions thereby attaining improved noise performance and/or reduce power consumption.
    Type: Application
    Filed: April 22, 2011
    Publication date: October 25, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventor: Ronald KAPUSTA
  • Publication number: 20120262315
    Abstract: A tracking module that tracks the operation of a digital-to-analog converter (DAC). The DAC tracking module may be included on-chip with a DAC, and be formed with similar circuit components as a DAC. The DAC tracking circuit may output a signal indicating that the DAC within a SAR ADC has settled to an approximate value during each bit conversion. A differential solution is also provided. Power may be optimized because optimal conversion speed may be achieved, and a comparator within the DAC may be turned off or placed in a standby mode at the end of bit conversions, and before the next conversion cycle in response to the signal output by the DAC tracking module.
    Type: Application
    Filed: April 13, 2011
    Publication date: October 18, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Ronald KAPUSTA, Junhua SHEN, Doris LIN
  • Publication number: 20120242523
    Abstract: Embodiments of the present disclosure may provide a charge redistribution DAC with an on-chip reservoir capacitor to provide charges to the DAC in lieu of traditional external reference voltages. The DAC may include the on-chip reservoir capacitor having a first plate and a second plate, an array of DAC capacitors to generate a DAC output, and an array of switches controlled by a DAC input word to couple the DAC capacitors to the reservoir capacitor. The charge redistribution DAC may further comprise a first switch connecting the first plate to an external terminal for a first external reference voltage, and a second switch connecting the second plate to an external terminal for a second external reference voltage. One embodiment may provide an ADC that includes the charge redistribution DAC.
    Type: Application
    Filed: March 23, 2011
    Publication date: September 27, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventor: Ronald KAPUSTA
  • Patent number: 8233069
    Abstract: An embodiment of the present invention may be directed to a multi channel imaging system. The multi channel imaging system may include an input for a light signal and a plurality of channel circuits. Each of the channel circuits may have an analog signal processing chain converting some portion of the light signal into to a digital representation, the plurality of channel circuits may operate in parallel. The multi channel imaging system may further comprise at least one dither circuit coupled to a point in at least one of the analog signal processing chains to add dither.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: July 31, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Ronald Kapusta
  • Patent number: 8223892
    Abstract: An apparatus and method for inter-channel data exchange in multi-channel data acquisition systems is disclosed. A multi-channel data acquisition system may include a data exchange layer coupling two or more channels of the data acquisition system. Data may be transmitted via the data exchange layer between the channels, enabling data from one channel to be processed and output by another channel. The data exchange layer may include a serial exchange layer or a parallel exchange layer.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: July 17, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Ronald A. Kapusta, Jr., Hiroto Shinozaki, Katsufumi Nakamura
  • Publication number: 20110298643
    Abstract: In one aspect, a method of reducing power consumption in a circuit by adaptive bias current generation of a bias current configured to bias, at least in part, at least one amplifier of the circuit is provided. The method comprises establishing the bias current based, at least in part, on a reference frequency of a reference clock providing a clock signal to at least one component of the circuit, and changing the bias current in response to a change in the reference frequency of the at least one reference clock, the bias current being change non-linearly with respect to the change in the reference frequency of the at least one reference clock. In another aspect, the method comprises establishing the bias current based, at least in part, on a capacitance of a reference capacitor, and changing the bias current in response to a change in the capacitance of the reference capacitor such that the bias current is changed non-linearly with respect to changes in the capacitance of the reference capacitor.
    Type: Application
    Filed: August 17, 2011
    Publication date: December 8, 2011
    Applicant: Analog Devices, Inc.
    Inventor: Ronald A. Kapusta, JR.
  • Patent number: 8044654
    Abstract: In one aspect, a method of reducing power consumption in a circuit by adaptive bias current generation of a bias current configured to bias, at least in part, at least one amplifier of the circuit is provided. The method comprises establishing the bias current based, at least in part, on a reference frequency of a reference clock providing a clock signal to at least one component of the circuit, and changing the bias current in response to a change in the reference frequency of the at least one reference clock, the bias current being change non-linearly with respect to the change in the reference frequency of the at least one reference clock. In another aspect, the method comprises establishing the bias current based, at least in part, on a capacitance of a reference capacitor, and changing the bias current in response to a change in the capacitance of the reference capacitor such that the bias current is changed non-linearly with respect to changes in the capacitance of the reference capacitor.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: October 25, 2011
    Assignee: Analog Devices, Inc.
    Inventor: Ronald A. Kapusta, Jr.
  • Patent number: 8035073
    Abstract: Embodiments of the present invention provide an apparatus and control method for an analog front end (AFE) amplifier for controlling DC restore operations. According to the exemplary method, a first input stage of the AFE is controlled to operate as a continuous time amplifier that has high input impedance and draws substantially no input leakage current for a first predetermined area of an imaging sensor image array. The first input stage is controlled to operate as a sample and hold amplifier with DC restore functionality for a second predetermined area of the imaging sensor image array. According to an embodiment, the AFE input stage operates as a continuous time amplifier when reading pixels from the sensor's active image array but operates as a sample and hold amplifier with DC restore when reading pixels from the image array that correspond to so-called ‘black-level’ pixels or pixels that otherwise fall outside the sensor's active image field.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: October 11, 2011
    Assignee: Analog Devices, Inc.
    Inventors: Ronald A. Kapusta, Katsu Nakamura
  • Patent number: 8008962
    Abstract: The invention is directed to an interface circuit for bridging voltage domains. The interface circuit receives an input signal, having a larger voltage domain, and safely provides the signal to an electronic device which has a smaller voltage domain. The interface circuit may include a transistor configured as a source follow so that an output of the transistor follows the input of the transistor. A blocking voltage may be provided at the input of the transistor to provide a voltage bias, blocking a range of input voltages to the transistor. The transistor may also have a blocking voltage at a drain terminal of the transistor, to block any output voltage above the blocking voltage.
    Type: Grant
    Filed: May 18, 2009
    Date of Patent: August 30, 2011
    Assignee: Analog Devices, Inc.
    Inventors: Ronald A. Kapusta, Jr., Katsu Nakamura, Eitake Ibaragi