Abstract: A method for conversion between a decimal floating-point number and an order-preserving format has been disclosed. The method encodes numbers in the decimal floating-point format into a format which preserves value ordering. This encoding allows for fast and direct string comparison of two values. Such an encoding provides normalized representations for decimal floating-point numbers and supports type-insensitive comparisons. Type-insensitive comparisons are often used in database management systems, where the data type is not specified for values to compare. In addition, the original decimal floating-point format can be recovered from the order-preserving format.

Abstract: A time synchronization apparatus, method and system are provided. In one aspect, the apparatus comprises at least a time of day clock, a first port operable to receive at least first time information using a first time protocol, a second port operable to receive at least second time information using a second time protocol, a third port operable to receive at least a timing signal, and a time stamp register operable to at least capture current value of the time of day clock upon receipt of the timing signal from the third port or the first time information from the first port or combination thereof.

Abstract: A system and method for providing an interruptible remainder instruction that can produce a quotient as well as a remainder. Remainders are computed through an iterative procedure. This procedure is carried out in a computer system's hardware by following a series of steps, the series being interruptible at any point. Each step reduces the magnitude of the dividend until the final remainder can be obtained. In the intermediate steps, the sign of the new (smaller in magnitude) dividend is kept the same as the sign of the original dividend, and the value Ni (which can be considered part of the quotient) is rounded toward zero. Only in the last step must the sign of the operands be considered and directed rounding be performed. Throughout the remainder operation, the partial quotients can be saved so that upon completion, not only has the remainder been computed, but so has the quotient.

Abstract: A computer system having a default floating point rounding mode that may be overridden by a rounding mode designated by an instruction. The current machine rounding mode is stored in a register, and an instruction includes a field for specifying whether rounding should be performed according to the current rounding mode or according to another rounding mode during execution thereof.

Abstract: A computer system having multiple floating point modes and common instructions for each mode in order to implement operations in a mode independent manner. A computer system includes two floating point modes supported by a common set of instructions for implementing operations, said instructions thereby being mode independent. The computer system includes a means for storing information for specifying the current floating point mode; and a floating point unit adapted to execute any one instruction from among the common set of instructions in accordance with the stored rounding mode and the operation associated with said instruction, thereby providing for mode independent operation. In an embodiment of the present invention, the floating point mode is either binary floating point or hexadecimal floating point.

Abstract: A system and method for providing an interruptible remainder instruction that can produce a quotient as well as a remainder. Remainders are computed through an iterative procedure. This procedure is carried out in a computer system's hardware by following a series of steps, the series being interruptible at any point. Each step reduces the magnitude of the dividend until the final remainder can be obtained. In the intermediate steps, the sign of the new (smaller in magnitude) dividend is kept the same as the sign of the original dividend, and the value Ni (which can be considered part of the quotient) is rounded toward zero. Only in the last step must the sign of the operands be considered and directed rounding be performed. Throughout the remainder operation, the partial quotients can be saved so that upon completion, not only has the remainder been computed, but so has the quotient.