Abstract: An MOS dynamic random access memory (RAM) includes an array of memory cells arranged in rows and columns. The array is divided into two or more sub-arrays. In an operating cycle where a cell is being accessed for reading and/or writing, only the sub-array containing the accessed cell is fully selected while the other sub-arrays are partially selected. A fully selected sub-array is one in which both a row and a column are selected, whereas in a partially selected sub-array, only a row is selected. In the partially selected sub-array where only refreshing of the cells in the selected row takes place, the column decoders and drivers remain inactive throughout the memory cycle.

Abstract: A memory is provided with standard rows and columns and spare rows and columns for substitution for standard rows and columns found to have defective cells. Each of the decoders associated with a standard row and/or column includes provision for being disconnected if found to be associated with a defective row or column. Each of the decoders associated with a spare row and/or column is designed normally to be deselected for any address but to be able to assume the address of any disconnected row or column. Disconnection of the standard decoders and substitution of the spare decoders are made possible by appropriate inclusion of fusible links which can be selectively opened by laser irradiation.