Patents by Inventor Ronan Barzic
Ronan Barzic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11860806Abstract: A microcontroller system comprising a master microcontroller unit, a further module and a general purpose input/output. In a first state the general purpose input/output is controlled by the master microcontroller unit and in a second state the general purpose input/output is controlled by the further module. The master microcontroller unit is arranged to transmit a selection signal which changes the state of the general purpose input/output.Type: GrantFiled: June 19, 2020Date of Patent: January 2, 2024Assignee: Nordic Semiconductor ASAInventors: Anders Nore, Ronan Barzic, Fredrik Jacobsen Fagerheim
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Publication number: 20230315181Abstract: Described herein is an embedded system comprising: at least one power domain comprising analogue and/or digital circuitry; at least one domain storage unit (166) for providing energy to the power domain; a main storage unit (172) for storing energy for provision to the at least one domain storage unit; power switches for controlling the flow of energy between the storage units of the circuit; and a power management unit operable to control the power switches to transfer energy from the at least one domain storage unit back to the main storage unit or to an additional domain storage unit of the system. Also described is a method for operating an embedded system.Type: ApplicationFiled: April 1, 2022Publication date: October 5, 2023Applicant: ONiO ASInventors: Vemund BAKKEN, Ronan BARZIC, Marco SILVA PEREIRA, Somayeh HOSSEIN ZADEH
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Patent number: 11775044Abstract: Described herein is an embedded system comprising: at least one power domain comprising analogue and/or digital circuitry; at least one domain storage unit (166) for providing energy to the power domain; a main storage unit (172) for storing energy for provision to the at least one domain storage unit; power switches for controlling the flow of energy between the storage units of the circuit; and a power management unit operable to control the power switches to transfer energy from the at least one domain storage unit back to the main storage unit or to an additional domain storage unit of the system. Also described is a method for operating an embedded system.Type: GrantFiled: April 1, 2022Date of Patent: October 3, 2023Assignee: ONIO ASInventors: Vemund Bakken, Ronan Barzic, Marco Silva Pereira, Somayeh Hossein Zadeh
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Patent number: 11698995Abstract: An integrated-circuit device comprises a processor, a peripheral component, a bus system, connected to the processor and to the peripheral component, and configured to carry bus transactions; and hardware filter logic. The bus system is configured to carry security-state signals for distinguishing between secure and non-secure bus transactions. The peripheral component comprises a register interface, accessible over the bus system, and comprising a hardware register and a direct-memory-access (DMA) controller for initiating bus transactions on the bus system. The peripheral component supports a secure-in-and-non-secure-out state in which the hardware filter logic is configured to prevent non-secure bus transactions from accessing the hardware register of the peripheral component, but to allow secure bus transactions to access the peripheral component.Type: GrantFiled: June 26, 2019Date of Patent: July 11, 2023Assignee: Nordic Semiconductor ASAInventors: Ronan Barzic, Berend Dekens, Frank Aune, Anders Nore
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Publication number: 20230195149Abstract: An embedded system comprises a circuit for executing operations, a power management unit for interfacing with at least one power source, a main storage unit for storing energy from the power source for provision to the circuit, at least one inductor for accumulating energy from the power source for transfer to the main storage unit and for accumulating energy from the main storage unit for transfer to the circuit, and a sensor circuit for monitoring a current through the at least one inductor as the energy is accumulated thereon. The power management unit is configured to connect the inductor to transfer energy to the main storage unit or to the circuit in response to a signal from the sensor circuit that peak current has been reached. Also described is a device including an embedded system and a method for operating an embedded system.Type: ApplicationFiled: December 17, 2021Publication date: June 22, 2023Applicant: ONiO ASInventors: Marco SILVA PEREIRA, Vemund BAKKEN, Ronan BARZIC, Somayeh HOSSEIN ZADEH
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Patent number: 11537762Abstract: An integrated-circuit device comprises a bus system connected to a processor, a plurality of peripherals, each connected to the bus system, hardware filter logic; and a peripheral interconnect system, separate from the bus system and connected to the peripherals. For each peripheral, the hardware filter logic stores a respective value determining whether the peripheral is in a secure state. The peripheral interconnect system provides a set of one or more channels for signalling events between peripherals. At least one channel is a secure channel or is configurable to be a secure channel. The peripheral interconnect system is configured to allow an event signal from a peripheral in the secure state to be sent over a secure channel and to prevent an event signal from a peripheral that is not in the secure state from being sent over the secure channel.Type: GrantFiled: June 26, 2019Date of Patent: December 27, 2022Assignee: Nordic Semiconductor ASAInventors: Ronan Barzic, Anders Nore, Vegard Endresen
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Publication number: 20220300446Abstract: A microcontroller system comprising a master microcontroller unit, a further module and a general purpose input/output. In a first state the general purpose input/output is controlled by the master microcontroller unit and in a second state the general purpose input/output is controlled by the further module. The master microcontroller unit is arranged to transmit a selection signal which changes the state of the general purpose input/output.Type: ApplicationFiled: June 19, 2020Publication date: September 22, 2022Applicant: Nordic Semiconductor ASAInventors: Anders NORE, Ronan BARZIC, Fredrik Jacobsen FAGERHEIM
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Patent number: 11231765Abstract: An integrated-circuit device comprises first and second peripherals, connected to a processor via a bus system, a peripheral interconnect that is separate from the bus system, wake up logic, a configuration memory and a power controller. In response to a change of state, the first peripheral generates event signals that are output to the peripheral interconnect. The peripheral interconnect provides the event signal to the second peripheral, which initiates tasks in response. The first peripheral, second peripheral and the wake-up logic are in a first, second and third power domain respectively. The power controller provides power to the third power domain whenever the first or second power domain is powered up. The wake-up logic detects an event signal from the first peripheral and, if it determines that the second peripheral is configured to initiate a task in response, it instructs the power controller to power up the second peripheral.Type: GrantFiled: June 26, 2019Date of Patent: January 25, 2022Assignee: Nordic Semiconductor ASAInventors: Anders Nore, Joar Rusten, Ronan Barzic, Vegard Endresen, Per-Carsten Skoglund
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Publication number: 20210271307Abstract: An integrated-circuit device comprises first and second peripherals, connected to a processor via a bus system, a peripheral interconnect that is separate from the bus system, wake up logic, a configuration memory and a power controller. In response to a change of state, the first peripheral generates event signals that are output to the peripheral interconnect. The peripheral interconnect provides the event signal to the second peripheral, which initiates tasks in response, The first peripheral, second peripheral and the wake-up logic are in a first, second and third power domain respectively. The power controller provides power to the third power domain whenever the first or second power domain is powered up. The wake-up logic detects an event signal from the first peripheral and, if it determines that the second peripheral is configured to initiate a task in response, it instructs the power controller to power up the second peripheral.Type: ApplicationFiled: June 26, 2019Publication date: September 2, 2021Applicant: Nordic Semiconductor ASAInventors: Anders NORE, Joar RUSTEN, Ronan BARZIC, Vegard ENDRESEN, Per-Carsten SKOGLUND
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Publication number: 20210264066Abstract: An integrated-circuit device comprises a processor, a peripheral component, a bus system, connected to the processor and to the peripheral component, and configured to carry bus transactions; and hardware filter logic. The bus system is configured to carry security-state signals for distinguishing between secure and non-secure bus transactions. The peripheral component comprises a register interface, accessible over the bus system, and comprising a hardware register and a direct-memory-access (DMA) controller for initiating bus transactions on the bus system. The peripheral component supports a secure-in-and-non-secure-out state in which the hardware filter logic is configured to prevent non-secure bus transactions from accessing the hardware register of the peripheral component, but to allow secure bus transactions to access the peripheral component.Type: ApplicationFiled: June 26, 2019Publication date: August 26, 2021Applicant: Nordic Semiconductor ASAInventors: Ronan BARZIC, Berend DEKENS, Frank AUNE, Anders NORE
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Publication number: 20210264065Abstract: An integrated-circuit device comprises a bus system connected to a processor, a plurality of peripherals, each connected to the bus system, hardware filter logic; and a peripheral interconnect system, separate from the bus system and connected to the peripherals. For each peripheral, the hardware filter logic stores a respective value determining whether the peripheral is in a secure state. The peripheral interconnect system provides a set of one or more channels for signalling events between peripherals. At least one channel is a secure channel or is configurable to be a secure channel. The peripheral interconnect system is configured to allow an event signal from a peripheral in the secure state to be sent over a secure channel and to prevent an event signal from a peripheral that is not in the secure state from being sent over the secure channel.Type: ApplicationFiled: June 26, 2019Publication date: August 26, 2021Applicant: Nordic Semiconductor ASAInventors: Ronan BARZIC, Anders NORE, Vegard ENDRESEN
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Patent number: 10203743Abstract: A microcontroller system includes a higher power reference voltage circuit and a lower power reference voltage circuit configured to draw less power than the higher power reference voltage circuit when enabled. The system includes a power state logic controller configured to enable the lower power reference voltage circuit to provide a first regulated voltage during a power saving mode, and, on exiting the power saving mode, enable the higher power reference voltage circuit to provide a second regulated voltage.Type: GrantFiled: April 18, 2017Date of Patent: February 12, 2019Assignee: Atmel CorporationInventors: Patrice Menard, Olivier Husson, Mickael Le Dily, Thierry Gourbilleau, Marc Laurent, Stefan Schabel, Ronan Barzic
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Publication number: 20170220093Abstract: A microcontroller system includes a higher power reference voltage circuit and a lower power reference voltage circuit configured to draw less power than the higher power reference voltage circuit when enabled. The system includes a power state logic controller configured to enable the lower power reference voltage circuit to provide a first regulated voltage during a power saving mode, and, on exiting the power saving mode, enable the higher power reference voltage circuit to provide a second regulated voltage.Type: ApplicationFiled: April 18, 2017Publication date: August 3, 2017Inventors: Patrice Menard, Olivier Husson, Mickael Le Dily, Thierry Gourbilleau, Marc Laurent, Stefan Schabel, Ronan Barzic
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Patent number: 9658682Abstract: A microcontroller system includes a higher power reference voltage circuit and a lower power reference voltage circuit configured to draw less power than the higher power reference voltage circuit when enabled. The system includes a power state logic controller configured to enable the lower power reference voltage circuit to provide a first regulated voltage during a power saving mode, and, on exiting the power saving mode, enable the higher power reference voltage circuit to provide a second regulated voltage.Type: GrantFiled: September 4, 2012Date of Patent: May 23, 2017Assignee: Atmel CorporationInventors: Patrice Menard, Olivier Husson, Mickael Le Dily, Thierry Gourbilleau, Marc Laurent, Stefan Schabel, Ronan Barzic
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Patent number: 9507406Abstract: A microcontroller system is organized into power domains. A power manager of the microcontroller system can change the power configuration of a power domain in response to event from an event generating module without activating a processor of the microcontroller system.Type: GrantFiled: March 5, 2013Date of Patent: November 29, 2016Assignee: Atmel CorporationInventors: Frode Milch Pedersen, Ronan Barzic, Patrice Menard, Mickael Le Dily, Thierry Gourbilleau, Morten Werner Lund
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Publication number: 20140089714Abstract: A microcontroller system is organized into power domains. A power manager of the microcontroller system can change the power configuration of a power domain in response to event from an event generating module without activating a processor of the microcontroller system.Type: ApplicationFiled: March 5, 2013Publication date: March 27, 2014Applicant: Atmel CorporationInventors: Frode Milch Pedersen, Ronan Barzic, Patrice Menard, Mickael Le Dily, Thierry Gourbilleau, Morten Werner Lund
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Publication number: 20140028384Abstract: A microcontroller system includes a higher power reference voltage circuit and a lower power reference voltage circuit configured to draw less power than the higher power reference voltage circuit when enabled. The system includes a power state logic controller configured to enable the lower power reference voltage circuit to provide a first regulated voltage during a power saving mode, and, on exiting the power saving mode, enable the higher power reference voltage circuit to provide a second regulated voltage.Type: ApplicationFiled: September 4, 2012Publication date: January 30, 2014Applicant: ATMEL CORPORATIONInventors: Patrice Menard, Olivier Husson, Mickael Le Dily, Thierry Gourbilleau, Marc Laurent, Stefan Schabel, Ronan Barzic
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Patent number: 8497741Abstract: A device includes an RC oscillator circuit and incorporates various features that individually and in combination can help improve the stability or accuracy of the oscillator output frequency. The oscillator circuit is operable to provide a tunable output frequency and includes a bias circuit switchable between first and second modes of operation. One of the modes has less drift in oscillator bias current relative to the other mode. The device also includes drift compensation circuitry that is operable to compensate for drift in the oscillator output frequency in a closed-loop mode of operation based on a comparison of the oscillator output frequency with a reference frequency. The device further includes a processor operable to compensate for temperature-based drift in the oscillator frequency in an open-loop mode of operation based on a measured temperature value in the vicinity of the oscillator circuit.Type: GrantFiled: October 12, 2011Date of Patent: July 30, 2013Assignee: Atmel CorporationInventors: Frode Milch Pedersen, Kristoffer Ellersgaard Koch, Ronan Barzic, Erwin Dotzauer
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Publication number: 20130093522Abstract: A device includes an RC oscillator circuit and incorporates various features that individually and in combination can help improve the stability or accuracy of the oscillator output frequency. The oscillator circuit is operable to provide a tunable output frequency and includes a bias circuit switchable between first and second modes of operation. One of the modes has less drift in oscillator bias current relative to the other mode. The device also includes drift compensation circuitry that is operable to compensate for drift in the oscillator output frequency in a closed-loop mode of operation based on a comparison of the oscillator output frequency with a reference frequency. The device further includes a processor operable to compensate for temperature-based drift in the oscillator frequency in an open-loop mode of operation based on a measured temperature value in the vicinity of the oscillator circuit.Type: ApplicationFiled: October 12, 2011Publication date: April 18, 2013Applicant: ATMEL CORPORATIONInventors: Frode Milch Pedersen, Kristoffer Ellersgaard Koch, Ronan Barzic, Erwin Dotzauer
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Patent number: 8223049Abstract: A low-cost charge injection mechanism may enable oversampling to be used on low frequency signals by injecting dither noise into the ADC input. The dither noise can reduce the quantization noise allowing even direct current (DC) signals to be oversampled correctly. A low-cost charge injection mechanism can also be used to improve the ENOB by characterizing the ADC and digitally correcting the converted signal for non-linearity errors such as INL. Reducing INL errors may also allow a higher degree of oversampling to be used to further improve the ENOB.Type: GrantFiled: December 2, 2010Date of Patent: July 17, 2012Assignee: Atmel CorporationInventors: Fredrik Larsen, Frode Milch Pedersen, Jan Rune Herheim, Ronan Barzic