Abstract: A delay line (DL) circuit used to generate test pattern waveforms has a pulse generating circuit that is used during calibration to generate a pulse signal upon receiving a signal edge. A delay line of the DL circuit receives the pulse signal and delays the pulse signal by a selected time delay. A feedback loop of the DL circuit feeds the delayed pulse signal output from the delay line back to the input of the pulse generating circuit. Receipt of an edge of the fed back pulse signal at the input of the pulse generating circuit causes the pulse generating circuit to generate another pulse signal. The delayed pulse signal output from the delay line can be input to a counter that generates a counter value that is based on the period of oscillation of the delayed pulse signal.

Abstract: Described is a circuit for receiving a differential input signal at two substantially symmetrically built up current paths and for providing an output signal therefrom. At least one current path comprises means for adjusting the timing information of the input signal to the timing information of the output signal. The adjustment can be accomplished by modifying a voltage level in the respective current path until the timing information of the output signals at least substantially represents the timing information of the input signal, e.g. by modifying an impedance or a current in the respective current path. The adjusting of the timing information is executed by applying a defined input signal with a known timing information, comparing the timing information of the resulting output signal with the timing information of the input signal, and modifying at least one voltage level in at least one of the current paths until the timing information of the output and input signals at least substantially match.