Patents by Inventor Ross Bannatyne

Ross Bannatyne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070220499
    Abstract: The present invention disclosed and claimed herein, in one aspect thereof, comprises a development system operating on a computer for evaluating compiled program code that was developed to run on a specific processor based functional IC having associated therewith memory and configurable data I/O modules, and which code defines the manner by which the functional IC will operate in a predetermined end application. An evaluation program is provided that is operable to run on the computer. A tool stick interfaces with the computer and includes a functional IC that is substantially operationally identical to the functional IC for which the compiled program code was developed to run on. The evaluation program is operable to interface with the tool stick to load the code in the functional IC associated with the tool stick and operable therewith such that the functional IC in the tool stick functions as a hardware emulator for the end application, such that the compiled code can be operated in hardware.
    Type: Application
    Filed: October 2, 2006
    Publication date: September 20, 2007
    Applicant: SILICON LABORATORIES INC.
    Inventors: Ross Bannatyne, Gautam Penumetcha, Leonard Staller, Phillip Bayes, Douglas Holberg
  • Patent number: 6496946
    Abstract: A method and apparatus for confirming the operation of memory (212) operates during periods when the memory is not operating in a standard execution mode. This strategy allows the memory to be checked real-time without impacting normal bandwidth of an associated CPU (200). The method and apparatus guarantees deterministic testing by including circuitry and steps which force bus mastership and, therefore, memory access if the memory is busy for too long a period of time.
    Type: Grant
    Filed: May 10, 1999
    Date of Patent: December 17, 2002
    Assignee: Motorola, Inc.
    Inventors: Ross Bannatyne, Clay E. Merritt, Nancy L. Thomas
  • Publication number: 20020056056
    Abstract: A method and apparatus for confirming the operation of memory (212) operates during periods when the memory is not operating in a standard execution mode. This strategy allows the memory to be checked real-time without impacting normal bandwidth of an associated CPU (200). The method and apparatus guarantees deterministic testing by including circuitry and steps which force bus mastership and, therefore, memory access if the memory is busy for too long a period of time.
    Type: Application
    Filed: May 10, 1999
    Publication date: May 9, 2002
    Inventors: ROSS BANNATYNE, CLAY E. MERRITT, NANCY L. THOMAS