Patents by Inventor Roy Edwards

Roy Edwards has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170387
    Abstract: A redistribution layer is formed on a carrier wafer. A cavity is formed within the redistribution layer. An electro-optical die is flip-chip connected to the redistribution layer. A plurality of optical fiber alignment structures within the electro-optical die is positioned over and exposed to the cavity. Mold compound material is disposed over the redistribution layer and the electro-optical die. A residual kerf region of the electro-optical die interfaces with the redistribution layer to prevent mold compound material from entering into the optical fiber alignment structures and the cavity. The carrier wafer is removed from the redistribution layer. The redistribution layer and the mold compound material are cut to obtain an electro-optical chip package that includes the electro-optical die. The cutting removes the residual kerf region from the electro-optical die to expose the plurality of optical fiber alignment structures and the cavity at an edge of the electro-optical chip package.
    Type: Application
    Filed: November 20, 2023
    Publication date: May 23, 2024
    Inventor: Roy Edward Meade
  • Patent number: 11958338
    Abstract: A vehicle is disclosed. The vehicle includes a passenger cabin; a steering assembly including a steering wheel mounted on a steering column assembly; and a ventilation system having a first air outlet for discharging a first jet of air, and a second air outlet for discharging a second jet of air. The first air outlet and the second air outlet are located on the steering column and the second jet of air intersects and deflects the first jet of air.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: April 16, 2024
    Assignee: Dyson Technology Limited
    Inventors: Roy Alan Harris, Adam Pinkstone, Tomasz Edward Pendleton, Roy Edward Poulton
  • Patent number: 11945021
    Abstract: A needle bending assembly configured to at least temporarily contain a needle can include a first housing section, a second housing section, and a coupling element coupled between the first housing section and the second housing section. The first housing section defines a first cavity configured to at least temporarily contain a first section of the needle. The second housing section defines a second cavity configured to at least temporarily contain a second section of the needle forming a distal tip. The coupling element is configured such that when the needle is contained within the housing sections, movement of the second housing section relative to the first housing section results in a bending of the needle at a location corresponding to the coupling element.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: April 2, 2024
    Assignee: BendRx, Inc.
    Inventors: Scott Edward Parazynski, John Spiegel Michels, Jr., Jeffrey William Bull, Roy Melling
  • Publication number: 20240084489
    Abstract: A combination washer/dryer machine has a rotatable drum inside a cabinet. The drum has an external surface. A tub is positioned inside the cabinet. The drum is rotatable in the tub. The tub has an inner surface. A seal extends between the exterior surface of the drum and the inner surface of the tub forming a desired gap during washing operations and the seal operates to minimize the bypass of drying air during drying operations.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: Arun Rajendran, Roy Edward Masters, JR.
  • Patent number: 11927598
    Abstract: An analyzer system for in vitro diagnostics includes a sample handler module having a robot arm that delivers samples from drawers into carriers on a linear synchronous motor automation track. Samples are delivered via the automation track to individual track sections associated with individual analyzer modules. Analyzer modules aspirate sample portions directly from the sample carriers and perform analysis thereon.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: March 12, 2024
    Assignee: Siemens Healthcare Diagnostics Inc.
    Inventors: David Stein, Roy Barr, Mark Edwards, Colin Mellars, Thomas J. Bao, Charles V. Cammarata, Benjamin S. Pollack, Baris Yagci, Beri Cohen
  • Patent number: 11918792
    Abstract: The present disclosure relates to a dose detection system for use with a medication delivery device in which a dose setting member rotates relative to an actuator during dose delivery. The dose detection system includes a module which is removably attached to the medication delivery device. The module includes a rotation sensor attached to the actuator during dose delivery. A sensed element is attached to the dose setting member and includes surface features detectable by the rotation sensor. The rotation sensor comprises a following member including a contact portion resting against and spring-biased in the direction of the surface features. The contact surface is positioned to move over the surface features during rotation of the sensed element, and the rotation sensor is responsive to the movement of the contact portion over the surface features to detect the rotation of the dose setting member.
    Type: Grant
    Filed: December 13, 2022
    Date of Patent: March 5, 2024
    Inventors: Matthew Thomas Antonelli, William Churchill Taliaferro Burke, Roy Howard Byerly, Christopher Robert McCaslin, Ethan Edward Pease, Kenneth Alan Ritsher
  • Publication number: 20240068145
    Abstract: A laundry appliance including a cabinet, a tub, and a drum. The tub is positioned inside the cabinet. The tub includes a front tub wall having a front tub opening, a rear tub wall, and a tub sidewall that extends between the front tub wall and the rear tub wall. The drum is rotatably supported within the tub. The drum includes a front drum opening, a rear drum wall, a drum sidewall that extends between the front drum opening and the rear drum wall, and a laundry compartment positioned inside the drum that is accessible through the front drum opening. An air gap is positioned radially between the tub sidewall and the drum sidewall. At least one heating element is positioned on or in the tub sidewall to heat the tub sidewall and therefore air flowing through the air gap.
    Type: Application
    Filed: August 23, 2022
    Publication date: February 29, 2024
    Applicant: Whirlpool Corporation
    Inventors: Roy Edward MASTERS, JR., Robert UNGLENIEKS
  • Patent number: 11916602
    Abstract: A remote memory system includes a substrate of a multi-chip package, an integrated circuit chip connected to the substrate, and an electro-optical chip connected to the substrate. The integrated circuit chip includes a high-bandwidth memory interface. An electrical interface of the electro-optical chip is electrically connected to the high-bandwidth memory interface. A photonic interface of the electro-optical chip is configured to optically connect with an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals received through the electrical interface from the high-bandwidth interface into outgoing optical data signals. The optical macro transmits the outgoing optical data signals through the photonic interface to the optical link. The optical macro also converts incoming optical data signals received through the photonic interface into incoming electrical data signals.
    Type: Grant
    Filed: February 14, 2021
    Date of Patent: February 27, 2024
    Assignee: Ayar Labs, Inc.
    Inventors: Roy Edward Meade, Vladimir Stojanovic, Chen Sun, Mark Wade, Hugo Saleh, Charles Wuischpard
  • Publication number: 20240061181
    Abstract: A package assembly includes a silicon photonics chip having an optical waveguide exposed at a first side of the chip and an optical fiber coupling region formed along the first side of the chip. The package assembly includes a mold compound structure formed to extend around second, third, and fourth sides of the chip. The mold compound structure has a vertical thickness substantially equal to a vertical thickness of the chip. The package assembly includes a redistribution layer formed over the chip and over a portion of the mold compound structure. The redistribution layer includes electrically conductive interconnect structures to provide fanout of electrical contacts on the chip to corresponding electrical contacts on the redistribution layer. The redistribution layer is formed to leave the optical fiber coupling region exposed. An optical fiber is connected to the optical fiber coupling region in optical alignment with the optical waveguide within the chip.
    Type: Application
    Filed: October 31, 2023
    Publication date: February 22, 2024
    Inventors: Shahab Ardalan, Michael Davenport, Roy Edward Meade
  • Patent number: 11899251
    Abstract: A vertical integrated photonics chiplet assembly includes a package substrate and an external device connected to a top surface of the package substrate. A photonics chip is disposed within the package substrate. The photonics chip includes optical coupling devices positioned at a top surface of the photonics chip. A plurality of conductive via structures are disposed within the package substrate in electrical connection with electrical circuits within the photonics chip. The plurality of conductive via structures are electrically connected through the package substrate to the external device. An opening is formed through the top surface of the substrate to expose a portion of the top surface of the photonics chip at which the optical coupling devices are positioned. An optical fiber array is disposed and secured within the opening such that a plurality of optical fibers of the optical fiber array optically couple to the optical coupling devices.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: February 13, 2024
    Assignee: Ayar Labs, Inc.
    Inventors: Chong Zhang, Roy Edward Meade
  • Publication number: 20240014904
    Abstract: An interposer device includes a substrate that includes a laser source chip interface region, a silicon photonics chip interface region, an optical amplifier module interface region. A fiber-to-interposer connection region is formed within the substrate. A first group of optical conveyance structures is formed within the substrate to optically connect a laser source chip to a silicon photonics chip when the laser source chip and the silicon photonics chip are interfaced to the substrate. A second group of optical conveyance structures is formed within the substrate to optically connect the silicon photonics chip to an optical amplifier module when the silicon photonics chip and the optical amplifier module are interfaced to the substrate. A third group of optical conveyance structures is formed within the substrate to optically connect the optical amplifier module to the fiber-to-interposer connection region when the optical amplifier module is interfaced to the substrate.
    Type: Application
    Filed: September 20, 2023
    Publication date: January 11, 2024
    Inventors: Chen Sun, Roy Edward Meade, Mark Wade, Alexandra Wright, Vladimir Stojanovic, Rajeev Ram, Milos Popovic, Derek Van Orden, Michael Davenport
  • Patent number: 11867944
    Abstract: An intact semiconductor wafer (wafer) includes a plurality of die. Each die has a top layer including routings of conductive interconnect structures electrically isolated from each other by intervening dielectric material. A top surface of the top layer corresponds to a top surface of the wafer. Below the top layer, each die has a device layer including optical devices and electronic devices. Each die has a cladding layer below the device layer and on a substrate of the wafer. Each die includes a photonic test port within the device layer. For each die, a light transfer region is formed within the intact wafer to extend through the top layer to the photonic test port within the device layer. The light transfer region provides a window for transmission of light into and out of the photonic test port from and to a location on the top surface of the wafer.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: January 9, 2024
    Assignee: Ayar Labs, Inc.
    Inventors: Roy Edward Meade, Chen Sun, Shahab Ardalan, John Fini, Forrest Sedgwick
  • Publication number: 20230414406
    Abstract: Freeze frame insert is a cooling device that is intended to provide users with a cooling surface for eyewear frames. To accomplish this, the device includes insulating sleeves and gel packets. As the insulating sleeves and gel packets can be made of varying dimensions, this allows the device to be used with any size or shape of glasses or eyewear. As such, the user can choose any style of frame or design without needing to specifically consider accommodating an integrated chilling method ahead of time. Further, both the insulating sleeve and the cooling gel packet can be resized as necessary during manufacture to fit any frame, regardless of the size of the shape of the eyewear. The insulating sleeve may furthermore be made from a more flexible material, allowing one insulating sleeve to flex to fit a variety of frames.
    Type: Application
    Filed: June 14, 2023
    Publication date: December 28, 2023
    Inventor: Roy Edwards Romano
  • Patent number: 11853273
    Abstract: Systems and methods are provided to enable a partial migration of applications from one database system to another without modifying the applications. In embodiments, a proxy server is configured to monitor the application's usage of a current database, and generate a migration plan to partially migrate database objects used by the application to a different type of database. An object may be selected for migration based on its usage level or its portability. After the partial migration, the proxy server may remain in place as a request router to route the application's requests to the two databases. In embodiments, the migration system may forward queries to both databases and compare the query results received from the two. Based on the comparison results, the migration system may programmatically determine adjustments to its query handling configuration settings.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: December 26, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: Roy Edward Stephan, Benjamin Snively, John MacDonald Winford, John Calhoun, Nathan McGuirt
  • Patent number: 11822128
    Abstract: A package assembly includes a silicon photonics chip having an optical waveguide exposed at a first side of the chip and an optical fiber coupling region formed along the first side of the chip. The package assembly includes a mold compound structure formed to extend around second, third, and fourth sides of the chip. The mold compound structure has a vertical thickness substantially equal to a vertical thickness of the chip. The package assembly includes a redistribution layer formed over the chip and over a portion of the mold compound structure. The redistribution layer includes electrically conductive interconnect structures to provide fanout of electrical contacts on the chip to corresponding electrical contacts on the redistribution layer. The redistribution layer is formed to leave the optical fiber coupling region exposed. An optical fiber is connected to the optical fiber coupling region in optical alignment with the optical waveguide within the chip.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: November 21, 2023
    Assignee: Ayar Labs, Inc.
    Inventors: Shahab Ardalan, Michael Davenport, Roy Edward Meade
  • Patent number: 11823990
    Abstract: A redistribution layer is formed on a carrier wafer. A cavity is formed within the redistribution layer. An electro-optical die is flip-chip connected to the redistribution layer. A plurality of optical fiber alignment structures within the electro-optical die is positioned over and exposed to the cavity. Mold compound material is disposed over the redistribution layer and the electro-optical die. A residual kerf region of the electro-optical die interfaces with the redistribution layer to prevent mold compound material from entering into the optical fiber alignment structures and the cavity. The carrier wafer is removed from the redistribution layer. The redistribution layer and the mold compound material are cut to obtain an electro-optical chip package that includes the electro-optical die. The cutting removes the residual kerf region from the electro-optical die to expose the plurality of optical fiber alignment structures and the cavity at an edge of the electro-optical chip package.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: November 21, 2023
    Assignee: Ayar Labs, Inc.
    Inventor: Roy Edward Meade
  • Publication number: 20230370170
    Abstract: A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.
    Type: Application
    Filed: July 18, 2023
    Publication date: November 16, 2023
    Inventors: Roy Edward Meade, Vladimir Stojanovic, Chen Sun, Mark Wade, Hugo Saleh, Charles Wuischpard
  • Patent number: 11807973
    Abstract: The airflow exhaust system for a combination washer/dryer includes an exit duct portion to couple with an exit from a tub. A lint screen box portion is associated with the exit duct. A transition duct portion is associated with the lint screen box portion. A fan is associated with the transition duct. The fan includes an outlet to couple with an exhaust tube. A mounting assembly stationarily fastens the airflow exhaust system within a housing of the combination washer/dryer machine.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: November 7, 2023
    Assignee: Whirlpool Corporation
    Inventor: Roy Edward Masters, Jr.
  • Publication number: 20230343655
    Abstract: A semiconductor wafer includes a semiconductor chip that includes a photonic device. The semiconductor chip includes an optical fiber attachment region in which an optical fiber alignment structure is to be fabricated. The optical fiber alignment structure is not yet fabricated in the optical fiber attachment region. The semiconductor chip includes an in-plane fiber-to-chip optical coupler positioned at an edge of the optical fiber attachment region. The in-plane fiber-to-chip optical coupler is optically connected to the photonic device. A sacrificial optical structure is optically coupled to the in-plane fiber-to-chip optical coupler. The sacrificial optical structure includes an out-of-plane optical coupler configured to receive input light from a light source external to the semiconductor chip. At least a portion of the sacrificial optical structure extends through the optical fiber attachment region.
    Type: Application
    Filed: July 3, 2023
    Publication date: October 26, 2023
    Inventors: Roy Edward Meade, Anatol Khilo, Forrest Sedgwick, Alexandra Wright
  • Patent number: 11799554
    Abstract: An interposer device includes a substrate that includes a laser source chip interface region, a silicon photonics chip interface region, an optical amplifier module interface region. A fiber-to-interposer connection region is formed within the substrate. A first group of optical conveyance structures is formed within the substrate to optically connect a laser source chip to a silicon photonics chip when the laser source chip and the silicon photonics chip are interfaced to the substrate. A second group of optical conveyance structures is formed within the substrate to optically connect the silicon photonics chip to an optical amplifier module when the silicon photonics chip and the optical amplifier module are interfaced to the substrate. A third group of optical conveyance structures is formed within the substrate to optically connect the optical amplifier module to the fiber-to-interposer connection region when the optical amplifier module is interfaced to the substrate.
    Type: Grant
    Filed: July 16, 2022
    Date of Patent: October 24, 2023
    Assignee: Ayar Labs, Inc.
    Inventors: Chen Sun, Roy Edward Meade, Mark Wade, Alexandra Wright, Vladimir Stojanovic, Rajeev Ram, Milos Popovic, Derek Van Orden, Michael Davenport